1 /* Definitions of target machine for GNU compiler, for the pdp-11
2 Copyright (C) 1994-2023 Free Software Foundation, Inc.
3 Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 GCC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21 #define CONSTANT_POOL_BEFORE_FUNCTION 0
22
23 /* check whether load_fpu_reg or not */
24 #define LOAD_FPU_REG_P(x) ((x) >= AC0_REGNUM && (x) <= AC3_REGNUM)
25 #define NO_LOAD_FPU_REG_P(x) ((x) == AC4_REGNUM || (x) == AC5_REGNUM)
26 #define FPU_REG_P(x) (LOAD_FPU_REG_P(x) || NO_LOAD_FPU_REG_P(x))
27 #define CPU_REG_P(x) ((x) <= PC_REGNUM)
28
29 /* Names to predefine in the preprocessor for this target machine. */
30
31 #define TARGET_CPU_CPP_BUILTINS() \
32 do \
33 { \
34 builtin_define_std ("pdp11"); \
35 if (TARGET_INT16) \
36 builtin_define_with_int_value ("__pdp11_int", 16); \
37 else \
38 builtin_define_with_int_value ("__pdp11_int", 32); \
39 if (TARGET_40) \
40 builtin_define_with_int_value ("__pdp11_model", 40); \
41 else if (TARGET_45) \
42 builtin_define_with_int_value ("__pdp11_model", 45); \
43 else \
44 builtin_define_with_int_value ("__pdp11_model", 10); \
45 if (TARGET_FPU) \
46 builtin_define ("__pdp11_fpu"); \
47 if (TARGET_AC0) \
48 builtin_define ("__pdp11_ac0"); \
49 } \
50 while (0)
51
52 #undef PREFERRED_DEBUGGING_TYPE
53 #define PREFERRED_DEBUGGING_TYPE NO_DEBUG
54
55 #define TARGET_40_PLUS (TARGET_40 || TARGET_45)
56 #define TARGET_10 (! TARGET_40_PLUS)
57
58 #define TARGET_UNIX_ASM_DEFAULT 0
59
60 /* "Dialect" just distinguishes between standard DEC mnemonics, which
61 are also used by the GNU assembler, vs. Unix mnemonics and float
62 register names. So it is tied to the -munit-asm option, and treats
63 -mgnu-asm and -mdec-asm as equivalent (both are dialect zero). */
64 #define ASSEMBLER_DIALECT (TARGET_UNIX_ASM ? 1 : 0)
65
66
67
68 /* TYPE SIZES */
69 #define SHORT_TYPE_SIZE 16
70 #define INT_TYPE_SIZE (TARGET_INT16 ? 16 : 32)
71 #define LONG_TYPE_SIZE 32
72 #define LONG_LONG_TYPE_SIZE 64
73
74 /* In earlier versions, FLOAT_TYPE_SIZE was selectable as 32 or 64,
75 but that conflicts with Fortran language rules. Since there is no
76 obvious reason why we should have that feature -- other targets
77 generally don't have float and double the same size -- I've removed
78 it. Note that it continues to be true (for now) that arithmetic is
79 always done with 64-bit values, i.e., the FPU is always in "double"
80 mode. */
81 #define FLOAT_TYPE_SIZE 32
82 #define DOUBLE_TYPE_SIZE 64
83 #define LONG_DOUBLE_TYPE_SIZE 64
84
85 /* machine types from ansi */
86 #define SIZE_TYPE "short unsigned int" /* definition of size_t */
87 #define WCHAR_TYPE "short int" /* or long int???? */
88 #define WCHAR_TYPE_SIZE 16
89
90 #define PTRDIFF_TYPE "short int"
91
92 /* target machine storage layout */
93
94 /* Define this if most significant bit is lowest numbered
95 in instructions that operate on numbered bit-fields. */
96 #define BITS_BIG_ENDIAN 0
97
98 /* Define this if most significant byte of a word is the lowest numbered. */
99 #define BYTES_BIG_ENDIAN 0
100
101 /* Define this if most significant word of a multiword number is first. */
102 #define WORDS_BIG_ENDIAN 1
103
104 /* Define that floats are in VAX order, not high word first as for ints. */
105 #define FLOAT_WORDS_BIG_ENDIAN 0
106
107 /* Width of a word, in units (bytes).
108
109 UNITS OR BYTES - seems like units */
110 #define UNITS_PER_WORD 2
111
112 /* This machine doesn't use IEEE floats. */
113 /* Because the pdp11 (at least Unix) convention for 32-bit ints is
114 big endian, opposite for what you need for float, the vax float
115 conversion routines aren't actually used directly. But the underlying
116 format is indeed the vax/pdp11 float format. */
117 extern const struct real_format pdp11_f_format;
118 extern const struct real_format pdp11_d_format;
119
120 /* Maximum sized of reasonable data type -- DImode ...*/
121 #define MAX_FIXED_MODE_SIZE 64
122
123 /* Allocation boundary (in *bits*) for storing pointers in memory. */
124 #define POINTER_BOUNDARY 16
125
126 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
127 #define PARM_BOUNDARY 16
128
129 /* Boundary (in *bits*) on which stack pointer should be aligned. */
130 #define STACK_BOUNDARY 16
131
132 /* Allocation boundary (in *bits*) for the code of a function. */
133 #define FUNCTION_BOUNDARY 16
134
135 /* Alignment of field after `int : 0' in a structure. */
136 #define EMPTY_FIELD_BOUNDARY 16
137
138 /* No data type wants to be aligned rounder than this. */
139 #define BIGGEST_ALIGNMENT 16
140
141 /* Define this if move instructions will actually fail to work
142 when given unaligned data. */
143 #define STRICT_ALIGNMENT 1
144
145 /* "HW_DIVIDE" actually means 64 by 32 bit divide. While some PDP11
146 models have hardware divide, it is for 32 by 16 bits only, so we
147 call this platform "no hardware divide". */
148 #define TARGET_HAS_NO_HW_DIVIDE 1
149
150 /* Standard register usage. */
151
152 /* Number of actual hardware registers.
153 The hardware registers are assigned numbers for the compiler
154 from 0 to just below FIRST_PSEUDO_REGISTER.
155 All registers that the compiler knows about must be given numbers,
156 even those that are not normally considered general registers.
157
158 we have 8 integer registers, plus 6 float
159 (don't use scratch float !) */
160
161 /* 1 for registers that have pervasive standard uses
162 and are not available for the register allocator.
163
164 On the pdp, these are:
165 Reg 7 = pc;
166 reg 6 = sp;
167 reg 5 = fp; not necessarily!
168 */
169
170 #define FIXED_REGISTERS \
171 {0, 0, 0, 0, 0, 0, 1, 1, \
172 0, 0, 0, 0, 0, 0, 1, 1, \
173 1 }
174
175
176
177 /* 1 for registers not available across function calls.
178 These must include the FIXED_REGISTERS and also any
179 registers that can be used without being saved.
180 The latter must include the registers where values are returned
181 and the register where structure-value addresses are passed.
182 Aside from that, you can include as many other registers as you like. */
183
184 /* don't know about fp */
185 #define CALL_USED_REGISTERS \
186 {1, 1, 0, 0, 0, 0, 1, 1, \
187 0, 0, 0, 0, 0, 0, 1, 1, \
188 1 }
189
190
191 /* Specify the registers used for certain standard purposes.
192 The values of these macros are register numbers. */
193
194 /* Register in which static-chain is passed to a function. */
195 /* ??? - i don't want to give up a reg for this! */
196 #define STATIC_CHAIN_REGNUM 4
197
198 /* Define the classes of registers for register constraints in the
199 machine description. Also define ranges of constants.
200
201 One of the classes must always be named ALL_REGS and include all hard regs.
202 If there is more than one class, another class must be named NO_REGS
203 and contain no registers.
204
205 The name GENERAL_REGS must be the name of a class (or an alias for
206 another name such as ALL_REGS). This is the class of registers
207 that is allowed by "g" or "r" in a register constraint.
208 Also, registers outside this class are allocated only when
209 instructions express preferences for them.
210
211 The classes must be numbered in nondecreasing order; that is,
212 a larger-numbered class must never be contained completely
213 in a smaller-numbered class.
214
215 For any two classes, it is very desirable that there be another
216 class that represents their union. */
217
218 /* The pdp has a couple of classes:
219
220 MUL_REGS are used for odd numbered regs, to use in 16-bit multiplication
221 (even numbered do 32-bit multiply)
222 GENERAL_REGS is all cpu
223 LOAD_FPU_REGS is the first four cpu regs, they are easier to load
224 NO_LOAD_FPU_REGS is ac4 and ac5, currently - difficult to load them
225 FPU_REGS is all fpu regs
226 CC_REGS is the condition codes (CPU and FPU)
227 */
228
229 enum reg_class
230 { NO_REGS,
231 NOTR0_REG,
232 NOTR1_REG,
233 NOTR2_REG,
234 NOTR3_REG,
235 NOTR4_REG,
236 NOTR5_REG,
237 NOTSP_REG,
238 MUL_REGS,
239 GENERAL_REGS,
240 LOAD_FPU_REGS,
241 NO_LOAD_FPU_REGS,
242 FPU_REGS,
243 CC_REGS,
244 ALL_REGS,
245 LIM_REG_CLASSES };
246
247 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
248
249 /* have to allow this till cmpsi/tstsi are fixed in a better way !! */
250 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
251
252 /* Give names of register classes as strings for dump file. */
253
254 #define REG_CLASS_NAMES \
255 { "NO_REGS", \
256 "NOTR0_REG", \
257 "NOTR1_REG", \
258 "NOTR2_REG", \
259 "NOTR3_REG", \
260 "NOTR4_REG", \
261 "NOTR5_REG", \
262 "SP_REG", \
263 "MUL_REGS", \
264 "GENERAL_REGS", \
265 "LOAD_FPU_REGS", \
266 "NO_LOAD_FPU_REGS", \
267 "FPU_REGS", \
268 "CC_REGS", \
269 "ALL_REGS" }
270
271 /* Define which registers fit in which classes.
272 This is an initializer for a vector of HARD_REG_SET
273 of length N_REG_CLASSES. */
274
275 #define REG_CLASS_CONTENTS \
276 { {0x00000}, /* NO_REGS */ \
277 {0x000fe}, /* NOTR0_REG */ \
278 {0x000fd}, /* NOTR1_REG */ \
279 {0x000fb}, /* NOTR2_REG */ \
280 {0x000f7}, /* NOTR3_REG */ \
281 {0x000ef}, /* NOTR4_REG */ \
282 {0x000df}, /* NOTR5_REG */ \
283 {0x000bf}, /* NOTSP_REG */ \
284 {0x0002a}, /* MUL_REGS */ \
285 {0x040ff}, /* GENERAL_REGS */ \
286 {0x00f00}, /* LOAD_FPU_REGS */ \
287 {0x03000}, /* NO_LOAD_FPU_REGS */ \
288 {0x03f00}, /* FPU_REGS */ \
289 {0x18000}, /* CC_REGS */ \
290 {0x1ffff}} /* ALL_REGS */
291
292 /* The same information, inverted:
293 Return the class number of the smallest class containing
294 reg number REGNO. This could be a conditional expression
295 or could index an array. */
296
297 #define REGNO_REG_CLASS(REGNO) pdp11_regno_reg_class (REGNO)
298
299 /* The class value for index registers, and the one for base regs. */
300 #define INDEX_REG_CLASS GENERAL_REGS
301 #define BASE_REG_CLASS GENERAL_REGS
302
303 /* Return TRUE if the class is a CPU register. */
304 #define CPU_REG_CLASS(CLASS) \
305 (CLASS >= NOTR0_REG && CLASS <= GENERAL_REGS)
306
307 /* Return the maximum number of consecutive registers
308 needed to represent mode MODE in a register of class CLASS. */
309 #define CLASS_MAX_NREGS(CLASS, MODE) \
310 (CPU_REG_CLASS (CLASS) ? \
311 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD): \
312 1 \
313 )
314
315 /* Stack layout; function entry, exit and calling. */
316
317 /* Define this if pushing a word on the stack
318 makes the stack pointer a smaller address. */
319 #define STACK_GROWS_DOWNWARD 1
320
321 /* Define this to nonzero if the nominal address of the stack frame
322 is at the high-address end of the local variables;
323 that is, each additional local variable allocated
324 goes at a more negative offset in the frame.
325 */
326 #define FRAME_GROWS_DOWNWARD 1
327
328 #define PUSH_ROUNDING(BYTES) pdp11_push_rounding (BYTES)
329
330 /* current_first_parm_offset stores the # of registers pushed on the
331 stack */
332 extern int current_first_parm_offset;
333
334 /* Offset of first parameter from the argument pointer register value. */
335 #define FIRST_PARM_OFFSET(FNDECL) 0
336
337 /* Define how to find the value returned by a function.
338 VALTYPE is the data type of the value (as a tree).
339 If the precise function being called is known, FUNC is its FUNCTION_DECL;
340 otherwise, FUNC is 0. */
341 #define BASE_RETURN_VALUE_REG(MODE) \
342 (FLOAT_MODE_P (MODE) ? AC0_REGNUM : RETVAL_REGNUM)
343
344 /* 1 if N is a possible register number for function argument passing.
345 - not used on pdp */
346
347 #define FUNCTION_ARG_REGNO_P(N) 0
348
349 /* Define a data type for recording info about an argument list
350 during the scan of that argument list. This data type should
351 hold all necessary information about the function itself
352 and about the args processed so far, enough to enable macros
353 such as FUNCTION_ARG to determine where the next arg should go.
354
355 */
356
357 #define CUMULATIVE_ARGS int
358
359 /* Initialize a variable CUM of type CUMULATIVE_ARGS
360 for a call to a function whose data type is FNTYPE.
361 For a library call, FNTYPE is 0.
362
363 ...., the offset normally starts at 0, but starts at 1 word
364 when the function gets a structure-value-address as an
365 invisible first argument. */
366
367 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
368 ((CUM) = 0)
369
370 /* Output assembler code to FILE to increment profiler label # LABELNO
371 for profiling a function entry. */
372
373 #define FUNCTION_PROFILER(FILE, LABELNO)
374
375 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
376 the stack pointer does not matter. The value is tested only in
377 functions that have frame pointers.
378 No definition is equivalent to always zero. */
379
380 #define EXIT_IGNORE_STACK 1
381
382 /* Definitions for register eliminations.
383
384 This is an array of structures. Each structure initializes one pair
385 of eliminable registers. The "from" register number is given first,
386 followed by "to". Eliminations of the same "from" register are listed
387 in order of preference.
388
389 There are two registers that can be eliminated on the pdp11. The
390 arg pointer can be replaced by the frame pointer; the frame pointer
391 can often be replaced by the stack pointer. */
392
393 #define ELIMINABLE_REGS \
394 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
395 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
396 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
397
398 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
399 ((OFFSET) = pdp11_initial_elimination_offset ((FROM), (TO)))
400
401
402 /* Addressing modes, and classification of registers for them. */
403
404 #define HAVE_POST_INCREMENT 1
405
406 #define HAVE_PRE_DECREMENT 1
407
408 /* Macros to check register numbers against specific register classes. */
409
410 /* These assume that REGNO is a hard or pseudo reg number.
411 They give nonzero only if REGNO is a hard reg of the suitable class
412 or a pseudo reg currently allocated to a suitable hard reg.
413 Since they use reg_renumber, they are safe only once reg_renumber
414 has been allocated, which happens in reginfo.cc during register
415 allocation. */
416
417 #define REGNO_OK_FOR_BASE_P(REGNO) \
418 ((REGNO) <= PC_REGNUM || (unsigned) reg_renumber[REGNO] <= PC_REGNUM || \
419 (REGNO) == ARG_POINTER_REGNUM || (REGNO) == FRAME_POINTER_REGNUM)
420
421 #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P (REGNO)
422
423 /* Now macros that check whether X is a register and also,
424 strictly, whether it is in a specified class.
425 */
426
427
428
429 /* Maximum number of registers that can appear in a valid memory address. */
430
431 #define MAX_REGS_PER_ADDRESS 1
432
433 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
434 and check its validity for a certain class.
435 We have two alternate definitions for each of them.
436 The usual definition accepts all pseudo regs; the other rejects
437 them unless they have been allocated suitable hard regs.
438 The symbol REG_OK_STRICT causes the latter definition to be used.
439
440 Most source files want to accept pseudo regs in the hope that
441 they will get allocated to the class that the insn wants them to be in.
442 Source files for reload pass need to be strict.
443 After reload, it makes no difference, since pseudo regs have
444 been eliminated by then. */
445
446 #ifndef REG_OK_STRICT
447
448 /* Nonzero if X is a hard reg that can be used as an index
449 or if it is a pseudo reg. */
450 #define REG_OK_FOR_INDEX_P(X) (1)
451 /* Nonzero if X is a hard reg that can be used as a base reg
452 or if it is a pseudo reg. */
453 #define REG_OK_FOR_BASE_P(X) (1)
454
455 #else
456
457 /* Nonzero if X is a hard reg that can be used as an index. */
458 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
459 /* Nonzero if X is a hard reg that can be used as a base reg. */
460 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
461
462 #endif
463
464 /* Specify the machine mode that this machine uses
465 for the index in the tablejump instruction. */
466 #define CASE_VECTOR_MODE HImode
467
468 /* Define this if a raw index is all that is needed for a
469 `tablejump' insn. */
470 #define CASE_TAKES_INDEX_RAW
471
472 /* Define this as 1 if `char' should by default be signed; else as 0. */
473 #define DEFAULT_SIGNED_CHAR 1
474
475 /* Max number of bytes we can move from memory to memory
476 in one reasonably fast instruction.
477 */
478 #define MOVE_MAX 2
479
480 /* Max number of insns to use for inline move rather than library
481 call. */
482 #define MOVE_RATIO(speed) 6
483
484 /* Nonzero if access to memory by byte is no faster than by word. */
485 #define SLOW_BYTE_ACCESS 1
486
487 /* Give a comparison code (EQ, NE etc) and the first operand of a COMPARE,
488 return the mode to be used for the comparison. */
489
490 #define SELECT_CC_MODE(OP,X,Y) pdp11_cc_mode (OP, X, Y)
491
492 /* Enable compare elimination pass. */
493 #undef TARGET_FLAGS_REGNUM
494 #define TARGET_FLAGS_REGNUM CC_REGNUM
495
496 /* Specify the CC registers. TODO: is this for "type 1" CC handling only? */
497 #undef TARGET_FIXED_CONDITION_CODE_REGS
498 #define TARGET_FIXED_CONDITION_CODE_REGS pdp11_fixed_cc_regs
499
500 /* Specify the machine mode that pointers have.
501 After generation of rtl, the compiler makes no further distinction
502 between pointers and any other objects of this machine mode. */
503 #define Pmode HImode
504
505 /* A function address in a call instruction
506 is a word address (for indexing purposes)
507 so give the MEM rtx a word's mode. */
508 #define FUNCTION_MODE HImode
509
510 /* Define this if addresses of constant functions
511 shouldn't be put through pseudo regs where they can be cse'd.
512 Desirable on machines where ordinary constants are expensive
513 but a CALL with constant address is cheap. */
514 /* #define NO_FUNCTION_CSE */
515
516
517 /* Control the assembler format that we output. */
518
519 /* Output to assembler file text saying following lines
520 may contain character constants, extra white space, comments, etc. */
521
522 #define ASM_APP_ON ""
523
524 /* Output to assembler file text saying following lines
525 no longer contain unusual constructs. */
526
527 #define ASM_APP_OFF ""
528
529 /* Output before read-only data. */
530
531 #define TEXT_SECTION_ASM_OP \
532 ((TARGET_DEC_ASM) ? "\t.psect\tcode,i,ro,con" : "\t.text")
533
534 /* Output before writable data. */
535
536 #define DATA_SECTION_ASM_OP \
537 ((TARGET_DEC_ASM) ? "\t.psect\tdata,d,rw,con" : "\t.data")
538
539 /* Output before read-only data. Same as read-write data for non-DEC
540 assemblers because they don't know about .rodata. */
541
542 #define READONLY_DATA_SECTION_ASM_OP \
543 ((TARGET_DEC_ASM) ? "\t.psect\trodata,d,ro,con" : "\t.data")
544
545 /* How to refer to registers in assembler output.
546 This sequence is indexed by compiler's hard-register-number (see above). */
547
548 #define REGISTER_NAMES \
549 {"r0", "r1", "r2", "r3", "r4", "r5", "sp", "pc", \
550 "ac0", "ac1", "ac2", "ac3", "ac4", "ac5", "ap", "cc", \
551 "fcc" }
552
553 /* Globalizing directive for a label. */
554 #define GLOBAL_ASM_OP "\t.globl\t"
555
556 /* The prefix to add to user-visible assembler symbols. For the DEC
557 assembler case, this is not used. */
558
559 #define USER_LABEL_PREFIX "_"
560
561 /* Line separators. */
562
563 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) \
564 ((C) == '\n' || (!TARGET_DEC_ASM && (C) == ';'))
565
566 /* This is how to store into the string LABEL
567 the symbol_ref name of an internal numbered label where
568 PREFIX is the class of label and NUM is the number within the class.
569 This is suitable for output with `assemble_name'. */
570
571 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
572 pdp11_gen_int_label ((LABEL), (PREFIX), (NUM))
573
574 /* Emit a string. */
575
576 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
577 output_ascii (FILE, P, SIZE)
578
579 /* Print a label reference, with _ prefix if not DEC. */
580
581 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
582 pdp11_output_labelref ((STREAM), (NAME))
583
584 /* Equate a symbol to an expression. */
585
586 #define ASM_OUTPUT_DEF(STREAM, NAME, VALUE) \
587 pdp11_output_def (STREAM, NAME, VALUE)
588
589 /* Mark a reference to an external symbol. Needed for DEC assembler. */
590
591 #define ASM_OUTPUT_EXTERNAL(STREAM, DECL, NAME) \
592 if (TARGET_DEC_ASM) \
593 fprintf ((STREAM), "\t.globl\t%s\n", (NAME))
594
595 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
596 if (TARGET_DEC_ASM) \
597 fprintf ((STREAM), ".title\t%s\n", (NAME))
598
599 /* This is how to output an element of a case-vector that is absolute. */
600
601 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
602 pdp11_output_addr_vec_elt (FILE, VALUE)
603
604 /* This is how to output an assembler line that says to advance the
605 location counter to a multiple of 2**LOG bytes. Only values 0 and
606 1 should appear, but due to PR87795 larger values (which are not
607 supported) can also appear. So we treat all alignment of LOG >= 1
608 as word (2 byte) alignment.
609 */
610
611 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
612 if (LOG != 0) \
613 fprintf (FILE, "\t.even\n")
614
615 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
616 do { \
617 if (TARGET_DEC_ASM) \
618 fprintf (FILE, "\t.blkb\t%o\n", (int) ((SIZE) & 0xffff)); \
619 else \
620 fprintf (FILE, "\t.=.+ %#o\n", (int) ((SIZE) & 0xffff)); \
621 } while (0)
622
623 /* This says how to output an assembler line
624 to define a global common symbol. */
625
626 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
627 pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, true)
628
629 /* This says how to output an assembler line
630 to define a local common symbol. */
631
632 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN) \
633 pdp11_asm_output_var (FILE, NAME, SIZE, ALIGN, false)
634
635 /* Print a memory address as an operand to reference that memory location. */
636
637 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
638 print_operand_address (FILE, ADDR)
639
640 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
641 fprintf (FILE, "\tmov\t%s,-(sp)\n", reg_names[REGNO])
642
643 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
644 fprintf (FILE, "\tmov\t(sp)+,%s\n", reg_names[REGNO])
645
646 #define TRAMPOLINE_SIZE 8
647 #define TRAMPOLINE_ALIGNMENT 16
648
649 #define BRANCH_COST(speed_p, predictable_p) 1
650
651 #define COMPARE_FLAG_MODE HImode
652
653 /* May be overridden by command option processing. */
654 #define TARGET_HAVE_NAMED_SECTIONS false
655
656 /* pdp11-unknown-aout target has no support of C99 runtime */
657 #undef TARGET_LIBC_HAS_FUNCTION
658 #define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function