1 /*
2 * Copyright (C) 2007-2023 Free Software Foundation, Inc.
3 *
4 * This file is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 3, or (at your option) any
7 * later version.
8 *
9 * This file is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * Under Section 7 of GPL version 3, you are granted additional
15 * permissions described in the GCC Runtime Library Exception, version
16 * 3.1, as published by the Free Software Foundation.
17 *
18 * You should have received a copy of the GNU General Public License and
19 * a copy of the GCC Runtime Library Exception along with this program;
20 * see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
21 * <http://www.gnu.org/licenses/>.
22 */
23
24 #ifndef _CPUID_H_INCLUDED
25 #define _CPUID_H_INCLUDED
26
27 /* %eax */
28 #define bit_RAOINT (1 << 3)
29 #define bit_AVXVNNI (1 << 4)
30 #define bit_AVX512BF16 (1 << 5)
31 #define bit_CMPCCXADD (1 << 7)
32 #define bit_AMX_FP16 (1 << 21)
33 #define bit_HRESET (1 << 22)
34 #define bit_AVXIFMA (1 << 23)
35
36 /* %ecx */
37 #define bit_SSE3 (1 << 0)
38 #define bit_PCLMUL (1 << 1)
39 #define bit_LZCNT (1 << 5)
40 #define bit_SSSE3 (1 << 9)
41 #define bit_FMA (1 << 12)
42 #define bit_CMPXCHG16B (1 << 13)
43 #define bit_SSE4_1 (1 << 19)
44 #define bit_SSE4_2 (1 << 20)
45 #define bit_MOVBE (1 << 22)
46 #define bit_POPCNT (1 << 23)
47 #define bit_AES (1 << 25)
48 #define bit_XSAVE (1 << 26)
49 #define bit_OSXSAVE (1 << 27)
50 #define bit_AVX (1 << 28)
51 #define bit_F16C (1 << 29)
52 #define bit_RDRND (1 << 30)
53
54 /* %edx */
55 #define bit_AVXVNNIINT8 (1 << 4)
56 #define bit_AVXNECONVERT (1 << 5)
57 #define bit_CMPXCHG8B (1 << 8)
58 #define bit_PREFETCHI (1 << 14)
59 #define bit_CMOV (1 << 15)
60 #define bit_MMX (1 << 23)
61 #define bit_FXSAVE (1 << 24)
62 #define bit_SSE (1 << 25)
63 #define bit_SSE2 (1 << 26)
64
65 /* Extended Features (%eax == 0x80000001) */
66 /* %ecx */
67 #define bit_LAHF_LM (1 << 0)
68 #define bit_ABM (1 << 5)
69 #define bit_SSE4a (1 << 6)
70 #define bit_PRFCHW (1 << 8)
71 #define bit_XOP (1 << 11)
72 #define bit_LWP (1 << 15)
73 #define bit_FMA4 (1 << 16)
74 #define bit_TBM (1 << 21)
75 #define bit_MWAITX (1 << 29)
76
77 /* %edx */
78 #define bit_MMXEXT (1 << 22)
79 #define bit_LM (1 << 29)
80 #define bit_3DNOWP (1 << 30)
81 #define bit_3DNOW (1u << 31)
82
83 /* %ebx */
84 #define bit_CLZERO (1 << 0)
85 #define bit_WBNOINVD (1 << 9)
86
87 /* Extended Features (%eax == 7) */
88 /* %ebx */
89 #define bit_FSGSBASE (1 << 0)
90 #define bit_SGX (1 << 2)
91 #define bit_BMI (1 << 3)
92 #define bit_HLE (1 << 4)
93 #define bit_AVX2 (1 << 5)
94 #define bit_BMI2 (1 << 8)
95 #define bit_RTM (1 << 11)
96 #define bit_AVX512F (1 << 16)
97 #define bit_AVX512DQ (1 << 17)
98 #define bit_RDSEED (1 << 18)
99 #define bit_ADX (1 << 19)
100 #define bit_AVX512IFMA (1 << 21)
101 #define bit_CLFLUSHOPT (1 << 23)
102 #define bit_CLWB (1 << 24)
103 #define bit_AVX512PF (1 << 26)
104 #define bit_AVX512ER (1 << 27)
105 #define bit_AVX512CD (1 << 28)
106 #define bit_SHA (1 << 29)
107 #define bit_AVX512BW (1 << 30)
108 #define bit_AVX512VL (1u << 31)
109
110 /* %ecx */
111 #define bit_PREFETCHWT1 (1 << 0)
112 #define bit_AVX512VBMI (1 << 1)
113 #define bit_PKU (1 << 3)
114 #define bit_OSPKE (1 << 4)
115 #define bit_WAITPKG (1 << 5)
116 #define bit_AVX512VBMI2 (1 << 6)
117 #define bit_SHSTK (1 << 7)
118 #define bit_GFNI (1 << 8)
119 #define bit_VAES (1 << 9)
120 #define bit_AVX512VNNI (1 << 11)
121 #define bit_VPCLMULQDQ (1 << 10)
122 #define bit_AVX512BITALG (1 << 12)
123 #define bit_AVX512VPOPCNTDQ (1 << 14)
124 #define bit_RDPID (1 << 22)
125 #define bit_MOVDIRI (1 << 27)
126 #define bit_MOVDIR64B (1 << 28)
127 #define bit_ENQCMD (1 << 29)
128 #define bit_CLDEMOTE (1 << 25)
129 #define bit_KL (1 << 23)
130
131 /* %edx */
132 #define bit_AVX5124VNNIW (1 << 2)
133 #define bit_AVX5124FMAPS (1 << 3)
134 #define bit_AVX512VP2INTERSECT (1 << 8)
135 #define bit_AVX512FP16 (1 << 23)
136 #define bit_IBT (1 << 20)
137 #define bit_UINTR (1 << 5)
138 #define bit_PCONFIG (1 << 18)
139 #define bit_SERIALIZE (1 << 14)
140 #define bit_TSXLDTRK (1 << 16)
141 #define bit_AMX_BF16 (1 << 22)
142 #define bit_AMX_TILE (1 << 24)
143 #define bit_AMX_INT8 (1 << 25)
144 #define bit_AMX_COMPLEX (1 << 8)
145
146 /* Extended State Enumeration Sub-leaf (%eax == 0xd, %ecx == 1) */
147 #define bit_XSAVEOPT (1 << 0)
148 #define bit_XSAVEC (1 << 1)
149 #define bit_XSAVES (1 << 3)
150
151 /* PT sub leaf (%eax == 0x14, %ecx == 0) */
152 /* %ebx */
153 #define bit_PTWRITE (1 << 4)
154
155 /* Keylocker leaf (%eax == 0x19) */
156 /* %ebx */
157 #define bit_AESKLE ( 1<<0 )
158 #define bit_WIDEKL ( 1<<2 )
159
160
161 /* Signatures for different CPU implementations as returned in uses
162 of cpuid with level 0. */
163 #define signature_AMD_ebx 0x68747541
164 #define signature_AMD_ecx 0x444d4163
165 #define signature_AMD_edx 0x69746e65
166
167 #define signature_CENTAUR_ebx 0x746e6543
168 #define signature_CENTAUR_ecx 0x736c7561
169 #define signature_CENTAUR_edx 0x48727561
170
171 #define signature_CYRIX_ebx 0x69727943
172 #define signature_CYRIX_ecx 0x64616574
173 #define signature_CYRIX_edx 0x736e4978
174
175 #define signature_INTEL_ebx 0x756e6547
176 #define signature_INTEL_ecx 0x6c65746e
177 #define signature_INTEL_edx 0x49656e69
178
179 #define signature_TM1_ebx 0x6e617254
180 #define signature_TM1_ecx 0x55504361
181 #define signature_TM1_edx 0x74656d73
182
183 #define signature_TM2_ebx 0x756e6547
184 #define signature_TM2_ecx 0x3638784d
185 #define signature_TM2_edx 0x54656e69
186
187 #define signature_NSC_ebx 0x646f6547
188 #define signature_NSC_ecx 0x43534e20
189 #define signature_NSC_edx 0x79622065
190
191 #define signature_NEXGEN_ebx 0x4778654e
192 #define signature_NEXGEN_ecx 0x6e657669
193 #define signature_NEXGEN_edx 0x72446e65
194
195 #define signature_RISE_ebx 0x65736952
196 #define signature_RISE_ecx 0x65736952
197 #define signature_RISE_edx 0x65736952
198
199 #define signature_SIS_ebx 0x20536953
200 #define signature_SIS_ecx 0x20536953
201 #define signature_SIS_edx 0x20536953
202
203 #define signature_UMC_ebx 0x20434d55
204 #define signature_UMC_ecx 0x20434d55
205 #define signature_UMC_edx 0x20434d55
206
207 #define signature_VIA_ebx 0x20414956
208 #define signature_VIA_ecx 0x20414956
209 #define signature_VIA_edx 0x20414956
210
211 #define signature_VORTEX_ebx 0x74726f56
212 #define signature_VORTEX_ecx 0x436f5320
213 #define signature_VORTEX_edx 0x36387865
214
215 #define signature_SHANGHAI_ebx 0x68532020
216 #define signature_SHANGHAI_ecx 0x20206961
217 #define signature_SHANGHAI_edx 0x68676e61
218
219 #ifndef __x86_64__
220 /* At least one cpu (Winchip 2) does not set %ebx and %ecx
221 for cpuid leaf 1. Forcibly zero the two registers before
222 calling cpuid as a precaution. */
223 #define __cpuid(level, a, b, c, d) \
224 do { \
225 if (__builtin_constant_p (level) && (level) != 1) \
226 __asm__ __volatile__ ("cpuid\n\t" \
227 : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
228 : "0" (level)); \
229 else \
230 __asm__ __volatile__ ("cpuid\n\t" \
231 : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
232 : "0" (level), "1" (0), "2" (0)); \
233 } while (0)
234 #else
235 #define __cpuid(level, a, b, c, d) \
236 __asm__ __volatile__ ("cpuid\n\t" \
237 : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
238 : "0" (level))
239 #endif
240
241 #define __cpuid_count(level, count, a, b, c, d) \
242 __asm__ __volatile__ ("cpuid\n\t" \
243 : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
244 : "0" (level), "2" (count))
245
246
247 /* Return highest supported input value for cpuid instruction. ext can
248 be either 0x0 or 0x80000000 to return highest supported value for
249 basic or extended cpuid information. Function returns 0 if cpuid
250 is not supported or whatever cpuid returns in eax register. If sig
251 pointer is non-null, then first four bytes of the signature
252 (as found in ebx register) are returned in location pointed by sig. */
253
254 static __inline unsigned int
255 __get_cpuid_max (unsigned int __ext, unsigned int *__sig)
256 {
257 unsigned int __eax, __ebx, __ecx, __edx;
258
259 #ifndef __x86_64__
260 /* See if we can use cpuid. On AMD64 we always can. */
261 #if __GNUC__ >= 3
262 __asm__ ("pushf{l|d}\n\t"
263 "pushf{l|d}\n\t"
264 "pop{l}\t%0\n\t"
265 "mov{l}\t{%0, %1|%1, %0}\n\t"
266 "xor{l}\t{%2, %0|%0, %2}\n\t"
267 "push{l}\t%0\n\t"
268 "popf{l|d}\n\t"
269 "pushf{l|d}\n\t"
270 "pop{l}\t%0\n\t"
271 "popf{l|d}\n\t"
272 : "=&r" (__eax), "=&r" (__ebx)
273 : "i" (0x00200000));
274 #else
275 /* Host GCCs older than 3.0 weren't supporting Intel asm syntax
276 nor alternatives in i386 code. */
277 __asm__ ("pushfl\n\t"
278 "pushfl\n\t"
279 "popl\t%0\n\t"
280 "movl\t%0, %1\n\t"
281 "xorl\t%2, %0\n\t"
282 "pushl\t%0\n\t"
283 "popfl\n\t"
284 "pushfl\n\t"
285 "popl\t%0\n\t"
286 "popfl\n\t"
287 : "=&r" (__eax), "=&r" (__ebx)
288 : "i" (0x00200000));
289 #endif
290
291 if (!((__eax ^ __ebx) & 0x00200000))
292 return 0;
293 #endif
294
295 /* Host supports cpuid. Return highest supported cpuid input value. */
296 __cpuid (__ext, __eax, __ebx, __ecx, __edx);
297
298 if (__sig)
299 *__sig = __ebx;
300
301 return __eax;
302 }
303
304 /* Return cpuid data for requested cpuid leaf, as found in returned
305 eax, ebx, ecx and edx registers. The function checks if cpuid is
306 supported and returns 1 for valid cpuid information or 0 for
307 unsupported cpuid leaf. All pointers are required to be non-null. */
308
309 static __inline int
310 __get_cpuid (unsigned int __leaf,
311 unsigned int *__eax, unsigned int *__ebx,
312 unsigned int *__ecx, unsigned int *__edx)
313 {
314 unsigned int __ext = __leaf & 0x80000000;
315 unsigned int __maxlevel = __get_cpuid_max (__ext, 0);
316
317 if (__maxlevel == 0 || __maxlevel < __leaf)
318 return 0;
319
320 __cpuid (__leaf, *__eax, *__ebx, *__ecx, *__edx);
321 return 1;
322 }
323
324 /* Same as above, but sub-leaf can be specified. */
325
326 static __inline int
327 __get_cpuid_count (unsigned int __leaf, unsigned int __subleaf,
328 unsigned int *__eax, unsigned int *__ebx,
329 unsigned int *__ecx, unsigned int *__edx)
330 {
331 unsigned int __ext = __leaf & 0x80000000;
332 unsigned int __maxlevel = __get_cpuid_max (__ext, 0);
333
334 if (__maxlevel == 0 || __maxlevel < __leaf)
335 return 0;
336
337 __cpuid_count (__leaf, __subleaf, *__eax, *__ebx, *__ecx, *__edx);
338 return 1;
339 }
340
341 static __inline void
342 __cpuidex (int __cpuid_info[4], int __leaf, int __subleaf)
343 {
344 __cpuid_count (__leaf, __subleaf, __cpuid_info[0], __cpuid_info[1],
345 __cpuid_info[2], __cpuid_info[3]);
346 }
347
348 #endif /* _CPUID_H_INCLUDED */