1 /* Copyright (C) 2015-2023 Free Software Foundation, Inc.
2
3 This file is part of GCC.
4
5 GCC is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3, or (at your option)
8 any later version.
9
10 GCC is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 Under Section 7 of GPL version 3, you are granted additional
16 permissions described in the GCC Runtime Library Exception, version
17 3.1, as published by the Free Software Foundation.
18
19 You should have received a copy of the GNU General Public License and
20 a copy of the GCC Runtime Library Exception along with this program;
21 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
22 <http://www.gnu.org/licenses/>. */
23
24 #if !defined _IMMINTRIN_H_INCLUDED
25 # error "Never use <avx5124fmapsintrin.h> directly; include <x86intrin.h> instead."
26 #endif
27
28 #ifndef _AVX5124FMAPSINTRIN_H_INCLUDED
29 #define _AVX5124FMAPSINTRIN_H_INCLUDED
30
31 #ifndef __AVX5124FMAPS__
32 #pragma GCC push_options
33 #pragma GCC target("avx5124fmaps")
34 #define __DISABLE_AVX5124FMAPS__
35 #endif /* __AVX5124FMAPS__ */
36
37 extern __inline __m512
38 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
39 _mm512_4fmadd_ps (__m512 __A, __m512 __B, __m512 __C,
40 __m512 __D, __m512 __E, __m128 *__F)
41 {
42 return (__m512) __builtin_ia32_4fmaddps ((__v16sf) __B,
43 (__v16sf) __C,
44 (__v16sf) __D,
45 (__v16sf) __E,
46 (__v16sf) __A,
47 (const __v4sf *) __F);
48 }
49
50 extern __inline __m512
51 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
52 _mm512_mask_4fmadd_ps (__m512 __A, __mmask16 __U, __m512 __B,
53 __m512 __C, __m512 __D, __m512 __E, __m128 *__F)
54 {
55 return (__m512) __builtin_ia32_4fmaddps_mask ((__v16sf) __B,
56 (__v16sf) __C,
57 (__v16sf) __D,
58 (__v16sf) __E,
59 (__v16sf) __A,
60 (const __v4sf *) __F,
61 (__v16sf) __A,
62 (__mmask16) __U);
63 }
64
65 extern __inline __m512
66 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
67 _mm512_maskz_4fmadd_ps (__mmask16 __U,
68 __m512 __A, __m512 __B, __m512 __C,
69 __m512 __D, __m512 __E, __m128 *__F)
70 {
71 return (__m512) __builtin_ia32_4fmaddps_mask ((__v16sf) __B,
72 (__v16sf) __C,
73 (__v16sf) __D,
74 (__v16sf) __E,
75 (__v16sf) __A,
76 (const __v4sf *) __F,
77 (__v16sf) _mm512_setzero_ps (),
78 (__mmask16) __U);
79 }
80
81 extern __inline __m128
82 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
83 _mm_4fmadd_ss (__m128 __A, __m128 __B, __m128 __C,
84 __m128 __D, __m128 __E, __m128 *__F)
85 {
86 return (__m128) __builtin_ia32_4fmaddss ((__v4sf) __B,
87 (__v4sf) __C,
88 (__v4sf) __D,
89 (__v4sf) __E,
90 (__v4sf) __A,
91 (const __v4sf *) __F);
92 }
93
94 extern __inline __m128
95 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
96 _mm_mask_4fmadd_ss (__m128 __A, __mmask8 __U, __m128 __B, __m128 __C,
97 __m128 __D, __m128 __E, __m128 *__F)
98 {
99 return (__m128) __builtin_ia32_4fmaddss_mask ((__v4sf) __B,
100 (__v4sf) __C,
101 (__v4sf) __D,
102 (__v4sf) __E,
103 (__v4sf) __A,
104 (const __v4sf *) __F,
105 (__v4sf) __A,
106 (__mmask8) __U);
107 }
108
109 extern __inline __m128
110 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
111 _mm_maskz_4fmadd_ss (__mmask8 __U, __m128 __A, __m128 __B, __m128 __C,
112 __m128 __D, __m128 __E, __m128 *__F)
113 {
114 return (__m128) __builtin_ia32_4fmaddss_mask ((__v4sf) __B,
115 (__v4sf) __C,
116 (__v4sf) __D,
117 (__v4sf) __E,
118 (__v4sf) __A,
119 (const __v4sf *) __F,
120 (__v4sf) _mm_setzero_ps (),
121 (__mmask8) __U);
122 }
123
124 extern __inline __m512
125 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
126 _mm512_4fnmadd_ps (__m512 __A, __m512 __B, __m512 __C,
127 __m512 __D, __m512 __E, __m128 *__F)
128 {
129 return (__m512) __builtin_ia32_4fnmaddps ((__v16sf) __B,
130 (__v16sf) __C,
131 (__v16sf) __D,
132 (__v16sf) __E,
133 (__v16sf) __A,
134 (const __v4sf *) __F);
135 }
136
137 extern __inline __m512
138 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
139 _mm512_mask_4fnmadd_ps (__m512 __A, __mmask16 __U, __m512 __B,
140 __m512 __C, __m512 __D, __m512 __E, __m128 *__F)
141 {
142 return (__m512) __builtin_ia32_4fnmaddps_mask ((__v16sf) __B,
143 (__v16sf) __C,
144 (__v16sf) __D,
145 (__v16sf) __E,
146 (__v16sf) __A,
147 (const __v4sf *) __F,
148 (__v16sf) __A,
149 (__mmask16) __U);
150 }
151
152 extern __inline __m512
153 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
154 _mm512_maskz_4fnmadd_ps (__mmask16 __U,
155 __m512 __A, __m512 __B, __m512 __C,
156 __m512 __D, __m512 __E, __m128 *__F)
157 {
158 return (__m512) __builtin_ia32_4fnmaddps_mask ((__v16sf) __B,
159 (__v16sf) __C,
160 (__v16sf) __D,
161 (__v16sf) __E,
162 (__v16sf) __A,
163 (const __v4sf *) __F,
164 (__v16sf) _mm512_setzero_ps (),
165 (__mmask16) __U);
166 }
167
168 extern __inline __m128
169 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
170 _mm_4fnmadd_ss (__m128 __A, __m128 __B, __m128 __C,
171 __m128 __D, __m128 __E, __m128 *__F)
172 {
173 return (__m128) __builtin_ia32_4fnmaddss ((__v4sf) __B,
174 (__v4sf) __C,
175 (__v4sf) __D,
176 (__v4sf) __E,
177 (__v4sf) __A,
178 (const __v4sf *) __F);
179 }
180
181 extern __inline __m128
182 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
183 _mm_mask_4fnmadd_ss (__m128 __A, __mmask8 __U, __m128 __B, __m128 __C,
184 __m128 __D, __m128 __E, __m128 *__F)
185 {
186 return (__m128) __builtin_ia32_4fnmaddss_mask ((__v4sf) __B,
187 (__v4sf) __C,
188 (__v4sf) __D,
189 (__v4sf) __E,
190 (__v4sf) __A,
191 (const __v4sf *) __F,
192 (__v4sf) __A,
193 (__mmask8) __U);
194 }
195
196 extern __inline __m128
197 __attribute__((__gnu_inline__, __always_inline__, __artificial__))
198 _mm_maskz_4fnmadd_ss (__mmask8 __U, __m128 __A, __m128 __B, __m128 __C,
199 __m128 __D, __m128 __E, __m128 *__F)
200 {
201 return (__m128) __builtin_ia32_4fnmaddss_mask ((__v4sf) __B,
202 (__v4sf) __C,
203 (__v4sf) __D,
204 (__v4sf) __E,
205 (__v4sf) __A,
206 (const __v4sf *) __F,
207 (__v4sf) _mm_setzero_ps (),
208 (__mmask8) __U);
209 }
210
211 #ifdef __DISABLE_AVX5124FMAPS__
212 #undef __DISABLE_AVX5124FMAPS__
213 #pragma GCC pop_options
214 #endif /* __DISABLE_AVX5124FMAPS__ */
215
216 #endif /* _AVX5124FMAPSINTRIN_H_INCLUDED */