1  /* Copyright (C) 2016-2023 Free Software Foundation, Inc.
       2  
       3     This file is free software; you can redistribute it and/or modify it under
       4     the terms of the GNU General Public License as published by the Free
       5     Software Foundation; either version 3 of the License, or (at your option)
       6     any later version.
       7  
       8     This file is distributed in the hope that it will be useful, but WITHOUT
       9     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
      10     FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
      11     for more details.
      12  
      13     You should have received a copy of the GNU General Public License
      14     along with GCC; see the file COPYING3.  If not see
      15     <http://www.gnu.org/licenses/>.  */
      16  
      17  #ifndef GCN_OPTS_H
      18  #define GCN_OPTS_H
      19  
      20  /* Which processor to generate code or schedule for.  */
      21  enum processor_type
      22  {
      23    PROCESSOR_FIJI,    // gfx803
      24    PROCESSOR_VEGA10,  // gfx900
      25    PROCESSOR_VEGA20,  // gfx906
      26    PROCESSOR_GFX908,
      27    PROCESSOR_GFX90a
      28  };
      29  
      30  #define TARGET_FIJI (gcn_arch == PROCESSOR_FIJI)
      31  #define TARGET_VEGA10 (gcn_arch == PROCESSOR_VEGA10)
      32  #define TARGET_VEGA20 (gcn_arch == PROCESSOR_VEGA20)
      33  #define TARGET_GFX908 (gcn_arch == PROCESSOR_GFX908)
      34  #define TARGET_GFX90a (gcn_arch == PROCESSOR_GFX90a)
      35  
      36  /* Set in gcn_option_override.  */
      37  extern enum gcn_isa {
      38    ISA_UNKNOWN,
      39    ISA_GCN3,
      40    ISA_GCN5,
      41    ISA_CDNA1,
      42    ISA_CDNA2
      43  } gcn_isa;
      44  
      45  #define TARGET_GCN3 (gcn_isa == ISA_GCN3)
      46  #define TARGET_GCN3_PLUS (gcn_isa >= ISA_GCN3)
      47  #define TARGET_GCN5 (gcn_isa == ISA_GCN5)
      48  #define TARGET_GCN5_PLUS (gcn_isa >= ISA_GCN5)
      49  #define TARGET_CDNA1 (gcn_isa == ISA_CDNA1)
      50  #define TARGET_CDNA1_PLUS (gcn_isa >= ISA_CDNA1)
      51  #define TARGET_CDNA2 (gcn_isa == ISA_CDNA2)
      52  #define TARGET_CDNA2_PLUS (gcn_isa >= ISA_CDNA2)
      53  
      54  #define TARGET_M0_LDS_LIMIT (TARGET_GCN3)
      55  #define TARGET_PACKED_WORK_ITEMS (TARGET_CDNA2_PLUS)
      56  
      57  enum sram_ecc_type
      58  {
      59    SRAM_ECC_OFF,
      60    SRAM_ECC_ON,
      61    SRAM_ECC_ANY
      62  };
      63  
      64  #endif