1 /* Declarations for the C-SKY back end.
2 Copyright (C) 2018-2023 Free Software Foundation, Inc.
3 Contributed by C-SKY Microsystems and Mentor Graphics.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20
21
22 #ifndef GCC_CSKY_H
23 #define GCC_CSKY_H
24
25 /* In some places e.g. csky_secondary_reload, we use -1 to indicate an
26 invalid register. In other places where N is unsigned the comparison
27 to zero would give an error, so explicitly cast to int here. */
28 #define CSKY_GENERAL_REGNO_P(N) \
29 ((N) < CSKY_NGPR_REGS && (int)(N) >= 0)
30
31 #define CSKY_VREG_LO_P(N) \
32 ((N) >= CSKY_FIRST_VFP_REGNUM \
33 && (N) <= CSKY_LAST_VFP_REGNUM)
34
35 #define CSKY_VREG_HI_P(N) \
36 ((N) >= CSKY_FIRST_VFP3_REGNUM \
37 && (N) <= CSKY_LAST_VFP3_REGNUM)
38
39 #define CSKY_VREG_P(N) \
40 (CSKY_VREG_LO_P(N) \
41 || CSKY_VREG_HI_P(N))
42
43 #define CSKY_HILO_REG_P(N) \
44 ((N) == CSKY_HI_REGNUM || (N) == CSKY_LO_REGNUM)
45
46 /* Helper macros for constant constraints and predicates. */
47 #define CSKY_VALUE_BETWEEN(VALUE, LOW, HIGH) \
48 ((VALUE) >= (LOW) && (VALUE) <= (HIGH))
49
50 #define CSKY_CONST_OK_FOR_I(VALUE) \
51 CSKY_VALUE_BETWEEN (VALUE, 0, 65535)
52
53 #define CSKY_CONST_OK_FOR_J(VALUE) \
54 CSKY_VALUE_BETWEEN (VALUE, 1, 32)
55
56 #define CSKY_CONST_OK_FOR_K(VALUE) \
57 CSKY_VALUE_BETWEEN (VALUE, 0, 31)
58
59 #define CSKY_CONST_OK_FOR_L(VALUE) \
60 CSKY_VALUE_BETWEEN (VALUE, 1, 8)
61
62 #define CSKY_CONST_OK_FOR_M(VALUE) \
63 CSKY_VALUE_BETWEEN (VALUE, 1, 4096)
64
65 #define CSKY_CONST_OK_FOR_N(VALUE) \
66 CSKY_VALUE_BETWEEN (VALUE, 1, 256)
67
68 #define CSKY_CONST_OK_FOR_O(VALUE) \
69 CSKY_VALUE_BETWEEN (VALUE, 0, 4095)
70
71 #define CSKY_CONST_OK_FOR_P(VALUE) \
72 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 4, 508))
73
74 #define CSKY_CONST_OK_FOR_T(VALUE) \
75 CSKY_VALUE_BETWEEN (VALUE, -256, -1)
76
77 #define CSKY_CONST_OK_FOR_Ub(VALUE) \
78 (exact_log2 (VALUE & 0xFFFFFFFF) >= 0)
79
80 #define CSKY_CONST_OK_FOR_Uc(VALUE) \
81 ((VALUE) == (HOST_WIDE_INT) -1 \
82 || (exact_log2 ((VALUE) + 1) >= 0 \
83 && exact_log2 ((VALUE) + 1) <= 31))
84
85 #define CSKY_CONST_OK_FOR_Ud(VALUE) \
86 ((CSKY_CONST_OK_FOR_I ((VALUE) & 0xffffffff) \
87 || CSKY_CONST_OK_FOR_Ub ((VALUE)) \
88 || CSKY_CONST_OK_FOR_Uc (((VALUE) << 32) >> 32)) \
89 && (CSKY_CONST_OK_FOR_I ((VALUE) >> 32) \
90 || CSKY_CONST_OK_FOR_Ub ((VALUE) >> 32) \
91 || CSKY_CONST_OK_FOR_Uc ((VALUE) >> 32))) \
92
93 #define CSKY_CONST_OK_FOR_Ug(VALUE) \
94 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -508, -4))
95
96 #define CSKY_CONST_OK_FOR_Uh(VALUE) \
97 CSKY_VALUE_BETWEEN (VALUE, -31, 0)
98
99 #define CSKY_CONST_OK_FOR_Uj(VALUE) \
100 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, 1, 1024))
101
102 #define CSKY_CONST_OK_FOR_Uk(VALUE) \
103 CSKY_VALUE_BETWEEN (VALUE, 1, 65536)
104
105 #define CSKY_CONST_OK_FOR_Ul(VALUE) \
106 (((VALUE) & 0x3) == 0 && CSKY_VALUE_BETWEEN (VALUE, -1024, -4))
107
108 #define CSKY_CONST_OK_FOR_Um(VALUE) \
109 CSKY_VALUE_BETWEEN (VALUE, -4096, -1)
110
111 #define CSKY_CONST_OK_FOR_US(VALUE) \
112 CSKY_VALUE_BETWEEN (VALUE, -8, -1)
113
114 #define CSKY_CONST_OK_FOR_MOVIH(VALUE) \
115 (((VALUE) & 0xFFFF) == 0)
116
117 #ifndef TARGET_CPU_DEFAULT
118 #define TARGET_CPU_DEFAULT CSKY_TARGET_CORE_GET(ck810f)
119 #endif
120
121 /* Options that are enabled by default are specified as such in the
122 .opt file. */
123 #define TARGET_DEFAULT 0
124
125 /* The highest CSKY architecture version supported by the target. */
126 #define CSKY_TARGET_ARCH(arch) \
127 (csky_base_arch == CSKY_TARGET_ARCH_GET (arch))
128
129 /* Define some macros for target code generation options. */
130 #define TARGET_SOFT_FPU \
131 (csky_fpu_index == TARGET_FPU_fpv2_sf)
132 #define TARGET_CASESI \
133 (optimize_size && TARGET_CONSTANT_POOL \
134 && (CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802)))
135 #define TARGET_TLS \
136 (CSKY_TARGET_ARCH (CK807) || CSKY_TARGET_ARCH (CK810) || CSKY_TARGET_ARCH (CK860))
137
138 /* Run-time Target Specification. */
139 #define TARGET_SOFT_FLOAT (csky_float_abi == CSKY_FLOAT_ABI_SOFT)
140 /* Use hardware floating point instructions. */
141 #define TARGET_HARD_FLOAT (csky_float_abi != CSKY_FLOAT_ABI_SOFT)
142 /* Use hardware floating point calling convention. */
143 #define TARGET_HARD_FLOAT_ABI (csky_float_abi == CSKY_FLOAT_ABI_HARD)
144
145 #define TARGET_SINGLE_FPU (csky_fpu_index == TARGET_FPU_fpv2_sf \
146 || csky_fpu_index == TARGET_FPU_fpv3_hsf \
147 || csky_fpu_index == TARGET_FPU_fpv3_hf)
148 #define TARGET_DOUBLE_FPU (TARGET_HARD_FLOAT && !TARGET_SINGLE_FPU)
149
150 #define FUNCTION_VARG_REGNO_P(REGNO) \
151 (TARGET_HARD_FLOAT_ABI \
152 && IN_RANGE ((REGNO), CSKY_FIRST_VFP_REGNUM, \
153 CSKY_FIRST_VFP_REGNUM + CSKY_NPARM_FREGS - 1))
154
155 #define CSKY_VREG_MODE_P(mode) \
156 ((mode) == SFmode || (mode) == DFmode \
157 || (CSKY_ISA_FEATURE(fpv3_hf) && (mode) == HFmode))
158
159 #define FUNCTION_VARG_MODE_P(mode) \
160 (TARGET_HARD_FLOAT_ABI \
161 && CSKY_VREG_MODE_P(mode) \
162 && !(mode == DFmode && TARGET_SINGLE_FPU))
163
164 #define TARGET_SUPPORT_FPV3 (CSKY_ISA_FEATURE (fpv3_hf) \
165 || CSKY_ISA_FEATURE (fpv3_sf) \
166 || CSKY_ISA_FEATURE (fpv3_df))
167
168 #define TARGET_SUPPORT_FPV2 (CSKY_ISA_FEATURE(fpv2_sf) \
169 || CSKY_ISA_FEATURE(fpv2_df) \
170 || CSKY_ISA_FEATURE(fpv2_divd))
171
172 /* Number of loads/stores handled by ldm/stm. */
173 #define CSKY_MIN_MULTIPLE_STLD 3
174 #define CSKY_MAX_MULTIPLE_STLD 12
175
176 /* Pull in enums and defines for processor/arch variants. This makes
177 it possible to use CSKY_TARGET_ARCH in macros defined in this file. */
178 #include "csky_opts.h"
179 extern enum csky_base_architecture csky_base_arch;
180
181 /* Pull in enums and defines for ISA features. Likewise required to
182 support use of CSKY_ISA_FEATURE in this file.
183 Note that the CSKY_ISA_FEATURE macro tests properties of the
184 particular processor we're compiling for, not code generation
185 options that may have dependencies on those features. The latter
186 are handled by TARGET_xxxx macros/variables instead. See csky.opt. */
187 #include "csky_isa.h"
188 extern int csky_arch_isa_features[];
189 #define CSKY_ISA_FEATURE(IDENT) \
190 csky_arch_isa_features[CSKY_ISA_FEATURE_GET (IDENT)]
191
192 /******************************************************************
193 * Storage Layout *
194 ******************************************************************/
195
196
197 /* Define this if most significant bit is lowest numbered
198 in instructions that operate on numbered bit-fields. */
199 #define BITS_BIG_ENDIAN 0
200
201 /* If the most significant byte of a word is the lowest numbered. */
202 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
203
204 /* If the most significant word of a multiword number is the lowest. */
205 #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN)
206
207 /* Width of a word, in units (bytes). */
208 #define UNITS_PER_WORD 4
209
210 /* Define this macro if it is advisable to hold scalars in registers
211 in a wider mode than that declared by the program. In such cases,
212 the value is constrained to be within the bounds of the declared
213 type, but kept valid in the wider mode. The signedness of the
214 extension may differ from that of the type. */
215 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \
216 if (GET_MODE_CLASS (MODE) == MODE_INT \
217 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
218 (MODE) = SImode;
219
220
221 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
222 #define PARM_BOUNDARY 32
223
224 /* Boundary (in *bits*) on which stack pointer should be aligned.
225 Per C-SKY, the published V2 ABI document is incorrect and the proper
226 alignment is on a 4-byte boundary rather than 8 bytes. */
227 #define STACK_BOUNDARY 32
228
229 /* Align definitions of arrays, unions and structures so that
230 initializations and copies can be made more efficient. This is not
231 ABI-changing, so it only affects places where we can see the
232 definition. Increasing the alignment tends to introduce padding,
233 so don't do this when optimizing for size/conserving stack space. */
234 #define CSKY_EXPAND_ALIGNMENT(COND, EXP, ALIGN) \
235 (((COND) && ((ALIGN) < BITS_PER_WORD) \
236 && (TREE_CODE (EXP) == ARRAY_TYPE \
237 || TREE_CODE (EXP) == UNION_TYPE \
238 || TREE_CODE (EXP) == RECORD_TYPE)) \
239 ? BITS_PER_WORD : (ALIGN))
240
241 /* Align global data. */
242 #define DATA_ALIGNMENT(EXP, ALIGN) \
243 CSKY_EXPAND_ALIGNMENT (!optimize_size, EXP, ALIGN)
244
245 /* Similarly, make sure that objects on the stack are sensibly aligned. */
246 #define LOCAL_ALIGNMENT(EXP, ALIGN) \
247 CSKY_EXPAND_ALIGNMENT (!flag_conserve_stack, EXP, ALIGN)
248
249 /* No data type wants to be aligned rounder than this. */
250 #define BIGGEST_ALIGNMENT 32
251
252 /* Every structures size must be a multiple of 8 bits. */
253 #define STRUCTURE_SIZE_BOUNDARY 8
254
255 /* Look at the fundamental type that is used for a bit-field and use
256 that to impose alignment on the enclosing structure.
257 struct s {int a:8}; should have same alignment as "int", not "char". */
258 #define PCC_BITFIELD_TYPE_MATTERS 1
259
260 /* Largest integer machine mode for structures. If undefined, the default
261 is GET_MODE_SIZE(DImode). */
262 #define MAX_FIXED_MODE_SIZE 64
263
264 /* Allocation boundary (in *bits*) for the code of a function.
265 Optimize ck801 and ck802 a little harder for size. */
266 #define FUNCTION_BOUNDARY \
267 (((CSKY_TARGET_ARCH (CK801) || CSKY_TARGET_ARCH (CK802)) \
268 && optimize_size) \
269 ? 16 : 32)
270
271 /* C-SKY does not support unaligned access. */
272 #define STRICT_ALIGNMENT 1
273
274 #undef SIZE_TYPE
275 #define SIZE_TYPE "unsigned int"
276
277 #undef PTRDIFF_TYPE
278 #define PTRDIFF_TYPE "int"
279
280 #undef WCHAR_TYPE
281 #define WCHAR_TYPE "long int"
282
283 #undef UINT_LEAST32_TYPE
284 #define UINT_LEAST32_TYPE "unsigned int"
285
286 #undef INT_LEAST32_TYPE
287 #define INT_LEAST32_TYPE "int"
288
289 #undef WCHAR_TYPE_SIZE
290 #define WCHAR_TYPE_SIZE BITS_PER_WORD
291
292 /******************************************************************
293 * Layout of Source Language Data Types *
294 ******************************************************************/
295
296
297 /* 'char' is unsigned by default for backward compatibility. */
298 #define DEFAULT_SIGNED_CHAR 0
299
300
301 /******************************************************************
302 * Stack Layout and Calling Conventions *
303 ******************************************************************/
304
305
306 /* Basic Stack Layout */
307
308
309 /* Define this if pushing a word on the stack
310 makes the stack pointer a smaller address. */
311 #define STACK_GROWS_DOWNWARD 1
312
313 /* Define this to nonzero if the nominal address of the stack frame
314 is at the high-address end of the local variables;
315 that is, each additional local variable allocated
316 goes at a more negative offset in the frame. */
317 #define FRAME_GROWS_DOWNWARD 1
318
319 /* Offset of first parameter from the argument pointer register value. */
320 #define FIRST_PARM_OFFSET(FNDECL) 0
321
322 /* A C expression whose value is RTL representing the value of the return
323 address for the frame COUNT steps up from the current frame. */
324 #define RETURN_ADDR_RTX(COUNT, FRAME) \
325 csky_return_addr (COUNT, FRAME)
326
327 /* Pick up the return address upon entry to a procedure. Used for
328 dwarf2 unwind information. This also enables the table driven
329 mechanism. */
330 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, CSKY_LR_REGNUM)
331
332
333 /* Exception Handling Support */
334
335 /* The register that holds the return address in exception handlers. */
336 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, CSKY_EH_STACKADJ_REGNUM)
337
338 /* Select a format to encode pointers in exception handling data. */
339 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
340 (((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4)
341
342 /* Registers That Address the Stack Frame */
343
344
345 /* Register to use for pushing function arguments. */
346 #define STACK_POINTER_REGNUM CSKY_SP_REGNUM
347
348 /* Base register for access to local variables of the function. */
349 #define FRAME_POINTER_REGNUM 36
350 #define HARD_FRAME_POINTER_REGNUM 8
351
352 /* Base register for access to arguments of the function. This is a fake
353 register that is always eliminated. */
354 #define ARG_POINTER_REGNUM 32
355
356 /* Static chain register.
357 Register use is more restricted on CK801. */
358 #define STATIC_CHAIN_REGNUM (CSKY_TARGET_ARCH (CK801) ? 13 : 12)
359
360
361 /* Eliminating Frame Pointer and Arg Pointer */
362
363
364 /* Definitions for register eliminations.
365
366 This is an array of structures. Each structure initializes one pair
367 of eliminable registers. The "from" register number is given first,
368 followed by "to". Eliminations of the same "from" register are listed
369 in order of preference.
370
371 We have two registers that can be eliminated on the CSKY. First, the
372 arg pointer register can often be eliminated in favor of the stack
373 pointer register. Secondly, the pseudo frame pointer register can always
374 be eliminated; it is replaced with the stack pointer. */
375 #define ELIMINABLE_REGS \
376 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },\
377 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM },\
378 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM },\
379 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },\
380 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }}
381
382 /* Define the offset between two registers, one to be eliminated, and the
383 other its replacement, at the start of a routine. */
384 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
385 (OFFSET) = csky_initial_elimination_offset (FROM, TO)
386
387
388 /* Passing Function Arguments on the Stack */
389
390
391 /* Define this if the maximum size of all the outgoing args is to be
392 accumulated and pushed during the prologue. The amount can be
393 found in the variable crtl->outgoing_args_size. */
394 #define ACCUMULATE_OUTGOING_ARGS 1
395
396
397 /* Passing Arguments in Registers */
398
399
400 /* A C type for declaring a variable that is used as the first argument of
401 TARGET_ FUNCTION_ARG and other related values. */
402 #if !defined (USED_FOR_TARGET)
403 typedef struct
404 {
405 int reg;
406 int freg;
407 bool is_stdarg;
408 } CUMULATIVE_ARGS;
409 #endif
410
411 /* Initialize a variable CUM of type CUMULATIVE_ARGS
412 for a call to a function whose data type is FNTYPE.
413 For a library call, FNTYPE is 0.
414
415 On CSKY, the offset always starts at 0: the first parm reg is always
416 the same reg. */
417 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
418 csky_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (INDIRECT))
419
420 /* True if N is a possible register number for function argument passing.
421 On the CSKY, r0-r3 are used to pass args.
422 The int cast is to prevent a complaint about unsigned comparison to
423 zero, since CSKY_FIRST_PARM_REGNUM is zero. */
424 #define FUNCTION_ARG_REGNO_P(REGNO) \
425 (((int)(REGNO) >= CSKY_FIRST_PARM_REGNUM \
426 && (REGNO) < (CSKY_NPARM_REGS + CSKY_FIRST_PARM_REGNUM)) \
427 || FUNCTION_VARG_REGNO_P(REGNO))
428
429 /* How Large Values Are Returned */
430
431
432 /* Define DEFAULT_PCC_STRUCT_RETURN to 1 if all structure and union return
433 values must be in memory. On the CSKY, small
434 structures (eight bytes or fewer) are returned in
435 the register pair r0/r1. */
436 #define DEFAULT_PCC_STRUCT_RETURN 0
437
438 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
439 the stack pointer does not matter. The value is tested only in
440 functions that have frame pointers.
441 No definition is equivalent to always zero.
442
443 On the CSKY, the function epilogue recovers the stack pointer from the
444 frame. */
445 #define EXIT_IGNORE_STACK 1
446
447
448 /******************************************************************
449 * Register Usage & Register Classes *
450 ******************************************************************/
451
452
453 #define FIRST_PSEUDO_REGISTER 202
454
455 /* 1 for registers that have pervasive standard uses
456 and are not available for the register allocator.
457 On C-SKY, r14 is SP, r26 is used by linker,
458 r27 is used by assembler, r28 is data base address,
459 r29 is GOT base address, r30 is handler base address,
460 r31 is TLS register. */
461 #define FIXED_REGISTERS \
462 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \
463 { 0, 0, 0, 0, 0, 0, 0, 0, \
464 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \
465 0, 0, 0, 0, 0, 0, 1, 0, \
466 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \
467 0, 0, 0, 0, 0, 0, 0, 0, \
468 /* r24 r25 r26 r27 r28 r29 r30 tls */ \
469 0, 0, 1, 1, 1, 1, 1, 1, \
470 /* reserved c hi lo */ \
471 1, 1, 0, 0, \
472 /* reserved */ \
473 1, 1, 1, 1, 1, 1, 1, 1, \
474 1, 1, 1, 1, 1, 1, 1, 1, \
475 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
476 0, 0, 0, 0, 0, 0, 0, 0, \
477 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
478 0, 0, 0, 0, 0, 0, 0, 0 , \
479 /* reserved */ \
480 1, 1, \
481 /* epc */ \
482 1, \
483 /* vr16 vr17 vr18 vr19 vr20 vr21 vr22 vr23 */ \
484 0, 0, 0, 0, 0, 0, 0, 0, \
485 /* vr24 vr25 vr26 vr27 vr28 vr29 vr30 vr31 */ \
486 0, 0, 0, 0, 0, 0, 0, 0 , \
487 /* reserved */ \
488 1, 1, 1, 1, 1, 1, 1, 1, \
489 1, 1, 1, 1, 1, 1, 1, 1, \
490 /* reserved */ \
491 1, 1, 1, 1, 1, 1, 1, 1, \
492 1, 1, 1, 1, 1, 1, 1, 1, \
493 1, 1, 1, 1, 1, 1, 1, 1, \
494 1, 1, 1, 1, 1, 1, 1, 1, \
495 \
496 1, 1, 1, 1, 1, 1, 1, 1, \
497 1, 1, 1, 1, 1, 1, 1, 1, \
498 1, 1, 1, 1, 1, 1, 1, 1, \
499 1, 1, 1, 1, 1, 1, 1, 1, \
500 \
501 1, 1, 1, 1, 1, 1, 1, 1, \
502 1, 1, 1, 1, 1, 1, 1, 1, \
503 1, 1, 1, 1, 1, 1, 1, 1, \
504 1, 1, 1, 1, 1, 1, 1, 1, \
505 \
506 1, 1, 1 \
507 }
508
509 /* Like `CALL_USED_REGISTERS' but used to overcome a historical
510 problem which makes CALL_USED_REGISTERS *always* include
511 all the FIXED_REGISTERS. Until this problem has been
512 resolved this macro can be used to overcome this situation.
513 In particular, block_propagate() requires this list
514 be accurate, or we can remove registers which should be live.
515 This macro is used in get_csky_live_regs(). */
516 #define CALL_REALLY_USED_REGISTERS \
517 /* r0 r1 r2 r3 r4 r5 r6 r7 */ \
518 { 1, 1, 1, 1, 0, 0, 0, 0, \
519 /* r8 r9 r10 r11 r12 r13 r14 r15 */ \
520 0, 0, 0, 0, 1, 1, 1, 0, \
521 /* r16 r17 r18 r19 r20 r21 r22 r23 */ \
522 0, 0, 1, 1, 1, 1, 1, 1, \
523 /* r24 r25 r26 r27 r28 r29 r30 r31 */ \
524 1, 1, 1, 1, 1, 1, 1, 1, \
525 /* reserved c hi lo */ \
526 1, 1, 1, 1, \
527 /* reserved */ \
528 1, 1, 1, 1, 1, 1, 1, 1, \
529 1, 1, 1, 1, 1, 1, 1, 1, \
530 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
531 1, 1, 1, 1, 1, 1, 1, 1, \
532 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
533 1, 1, 1, 1, 1, 1, 1, 1, \
534 /* reserved */ \
535 1, 1, \
536 /* epc */ \
537 1, \
538 /* vr16 vr17 vr18 vr19 vr20 vr21 vr22 vr23*/ \
539 1, 1, 1, 1, 1, 1, 1, 1, \
540 /* vr24 vr25 vr26 vr27 vr28 vr29 vr30 vr31 */ \
541 1, 1, 1, 1, 1, 1, 1, 1, \
542 /* reserved */ \
543 1, 1, 1, 1, 1, 1, 1, 1, \
544 1, 1, 1, 1, 1, 1, 1, 1, \
545 /* reserved */ \
546 1, 1, 1, 1, 1, 1, 1, 1, \
547 1, 1, 1, 1, 1, 1, 1, 1, \
548 1, 1, 1, 1, 1, 1, 1, 1, \
549 1, 1, 1, 1, 1, 1, 1, 1, \
550 \
551 1, 1, 1, 1, 1, 1, 1, 1, \
552 1, 1, 1, 1, 1, 1, 1, 1, \
553 1, 1, 1, 1, 1, 1, 1, 1, \
554 1, 1, 1, 1, 1, 1, 1, 1, \
555 \
556 1, 1, 1, 1, 1, 1, 1, 1, \
557 1, 1, 1, 1, 1, 1, 1, 1, \
558 1, 1, 1, 1, 1, 1, 1, 1, \
559 1, 1, 1, 1, 1, 1, 1, 1, \
560 \
561 1, 1, 1 \
562 }
563
564 #define REGISTER_NAMES \
565 { \
566 "a0", "a1", "a2", "a3", "l0", "l1", "l2", "l3", \
567 "l4", "l5", "l6", "l7", "t0", "t1", "sp", "lr", \
568 "l8", "l9", "t2", "t3", "t4", "t5", "t6", "t7", \
569 "t8", "t9", "r26", "r27", "gb", "r29", "svbr", "r31", \
570 /* reserved */ \
571 "reserved", \
572 /* CC register: 33 */ \
573 "c", \
574 /* DSP instruction register: 34, 35 */ \
575 "hi", "lo", \
576 "reserved", "reserved", "reserved", "reserved", "reserved", \
577 "reserved", "reserved", "reserved", "reserved", "reserved", \
578 "reserved", "reserved", "reserved", "reserved", "reserved", \
579 "reserved", \
580 /* V registers: 52~67 */ \
581 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7", \
582 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15", \
583 "reserved", "reserved", \
584 "epc", \
585 /* V registers: 71~86 */ \
586 "vr16", "vr17", "vr18", "vr19", "vr20", "vr21", "vr22", "vr23", \
587 "vr24", "vr25", "vr26", "vr27", "vr28", "vr29", "vr30", "vr31", \
588 "reserved", "reserved", "reserved", "reserved", "reserved", \
589 "reserved", "reserved", "reserved", "reserved", "reserved", \
590 "reserved", "reserved", "reserved", "reserved", "reserved", \
591 "reserved", \
592 /* reserved: 87~201*/ \
593 "reserved", "reserved", "reserved", "reserved", "reserved", \
594 "reserved", "reserved", "reserved", "reserved", "reserved", \
595 "reserved", "reserved", "reserved", "reserved", "reserved", \
596 "reserved", "reserved", "reserved", "reserved", "reserved", \
597 "reserved", "reserved", "reserved", "reserved", "reserved", \
598 "reserved", "reserved", "reserved", "reserved", "reserved", \
599 "reserved", "reserved", \
600 "reserved", "reserved", "reserved", "reserved", "reserved", \
601 "reserved", "reserved", "reserved", "reserved", "reserved", \
602 "reserved", "reserved", "reserved", "reserved", "reserved", \
603 "reserved", "reserved", "reserved", "reserved", "reserved", \
604 "reserved", "reserved", "reserved", "reserved", "reserved", \
605 "reserved", "reserved", "reserved", "reserved", "reserved", \
606 "reserved", "reserved", \
607 "reserved", "reserved", "reserved", "reserved", "reserved", \
608 "reserved", "reserved", "reserved", "reserved", "reserved", \
609 "reserved", "reserved", "reserved", "reserved", "reserved", \
610 "reserved", "reserved", "reserved", "reserved", "reserved", \
611 "reserved", "reserved", "reserved", "reserved", "reserved", \
612 "reserved", "reserved", "reserved", "reserved", "reserved", \
613 "reserved", "reserved", \
614 "reserved", "reserved", "reserved" \
615 }
616
617 /* Table of additional register names to use in user input. */
618 #define ADDITIONAL_REGISTER_NAMES \
619 { \
620 {"r0", 0}, \
621 {"r1", 1}, \
622 {"r2", 2}, \
623 {"r3", 3}, \
624 {"r4", 4}, \
625 {"r5", 5}, \
626 {"r6", 6}, \
627 {"r7", 7}, \
628 {"r8", 8}, \
629 {"r9", 9}, \
630 {"r10", 10}, \
631 {"r11", 11}, \
632 {"r12", 12}, \
633 {"r13", 13}, \
634 {"r14", 14}, \
635 {"r15", 15}, \
636 {"r16", 16}, \
637 {"r17", 17}, \
638 {"r18", 18}, \
639 {"r19", 19}, \
640 {"r20", 20}, \
641 {"r21", 21}, \
642 {"r22", 22}, \
643 {"r23", 23}, \
644 {"r24", 24}, \
645 {"r25", 25}, \
646 {"r26", 26}, \
647 {"r27", 27}, \
648 {"r28", 28}, \
649 {"r29", 29}, \
650 {"r30", 30}, \
651 {"r31", 31}, \
652 }
653
654 /* The order in which registers should be allocated.
655 It is better to use the registers the caller need not save.
656 Allocate r0 through r3 in reverse order since r3 is least likely
657 to contain a function parameter; in addition results are returned
658 in r0. It is quite good to use lr since other calls may clobber
659 it anyway. */
660 #define REG_ALLOC_ORDER \
661 /* r3 r2 r1 r0 r12 r13 r18 r19 */ \
662 { 3, 2, 1, 0, 12, 13, 18, 19, \
663 /* r20 r21 r22 r23 r24 r25 */ \
664 20, 21, 22, 23, 24, 25, \
665 /* r15 r4 r5 r6 r7 r8 r9 r10 r11 */ \
666 15, 4, 5, 6, 7, 8, 9, 10, 11, \
667 /* r16 r17 r26 r27 r28 r29 r30 hi lo */ \
668 16, 17, 26, 27, 28, 29, 30, 34, 35, \
669 /* vr0 vr1 vr2 vr3 vr4 vr5 vr6 vr7 */ \
670 52, 53, 54, 55, 56, 57, 58, 59, \
671 /* vr8 vr9 vr10 vr11 vr12 vr13 vr14 vr15 */ \
672 60, 61, 62, 63, 64, 65, 66, 67, \
673 /* vr16 vr17 vr18 vr18 vr20 vr21 vr22 vr23 */ \
674 71, 72, 73, 74, 75, 76, 77, 78, \
675 /* vr24 vr25 vr26 vr27 vr28 vr28 vr30 vr31 */ \
676 79, 80, 81, 82, 83, 84, 85, 86, \
677 /* reserved */ \
678 36, 37, 38, 39, 40, 41, 42, 43, \
679 44, 45, 46, 47, 48, 49, 50, 51, \
680 /* reserved */ \
681 87, 88, 89, 90, 91, 92, 93, 94, \
682 95, 96, 97, 98, 99, 100, 101, 102, \
683 /* sp tls reserved c reserved epc */ \
684 14, 31, 32, 33, 68, 69, 70 }
685
686 /* Register classes. */
687 enum reg_class
688 {
689 NO_REGS,
690 MINI_REGS,
691 SP_REGS,
692 LOW_REGS,
693 GENERAL_REGS,
694 C_REGS,
695 HILO_REGS,
696 V_REGS,
697 OTHER_REGS,
698 RESERVE_REGS,
699 ALL_REGS,
700 LIM_REG_CLASSES
701 };
702
703 #define N_REG_CLASSES (int) LIM_REG_CLASSES
704
705 /* Give names of register classes as strings for dump file. */
706 #define REG_CLASS_NAMES \
707 { \
708 "NO_REGS", \
709 "MINI_REGS", \
710 "SP_REGS", \
711 "LOW_REGS", \
712 "GENERAL_REGS", \
713 "C_REGS", \
714 "HILO_REGS", \
715 "V_REGS", \
716 "OTHER_REGS", \
717 "RESERVE_REGS", \
718 "ALL_REGS", \
719 }
720
721 /* Define which registers fit in which classes. This is an initializer
722 for a vector of HARD_REG_SET of length N_REG_CLASSES. */
723 #define REG_CLASS_CONTENTS \
724 { \
725 {0x00000000, 0x00000000, 0x00000000, 0x00000000, \
726 0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
727 {0x000000FF, 0x00000000, 0x00000000, 0x00000000, \
728 0x00000000, 0x00000000, 0x00000000}, /* MINI_REGS */ \
729 {0x00004000, 0x00000000, 0x00000000, 0x00000000, \
730 0x00000000, 0x00000000, 0x00000000}, /* SP_REGS */ \
731 {0x0000FFFF, 0x00000000, 0x00000000, 0x00000000, \
732 0x00000000, 0x00000000, 0x00000000}, /* LOW_REGS */ \
733 {0xFFFFFFFF, 0x00000000, 0x00000000, 0x00000000, \
734 0x00000000, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
735 {0x00000000, 0x00000002, 0x00000000, 0x00000000, \
736 0x00000000, 0x00000000, 0x00000000}, /* C_REGS */ \
737 {0x00000000, 0x0000000c, 0x00000000, 0x00000000, \
738 0x00000000, 0x00000000, 0x00000000}, /* HILO_REGS */ \
739 {0x00000000, 0xFFF00000, 0x007FFF8F, 0x00000000, \
740 0x00000000, 0x00000000, 0x00000000}, /* V_REGS */ \
741 {0x00000000, 0x00000000, 0x00000040, 0x00000000, \
742 0x00000000, 0x00000000, 0x00000000}, /* OTHER_REGS */ \
743 {0x00000000, 0x000FFFF1, 0xFF800030, 0xFFFFFFFF, \
744 0xFFFFFFFF, 0xFFFFFFFF, 0x000003FF}, /* RESERVE_REGS */ \
745 {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
746 0xFFFFFFFF, 0xFFFFFFFF, 0x000003FF}, /* ALL_REGS */ \
747 }
748
749 /* Return register class from regno. */
750 extern enum reg_class regno_reg_class[FIRST_PSEUDO_REGISTER];
751 #define REGNO_REG_CLASS(REGNO) regno_reg_class[REGNO]
752
753 /* The class value for index registers, and the one for base regs. */
754 #define INDEX_REG_CLASS (CSKY_ISA_FEATURE (2E3) ? GENERAL_REGS : NO_REGS)
755 #define BASE_REG_CLASS GENERAL_REGS
756
757 /* TODO is it necessary to set it to MINI_REGS to emit more 16-bit
758 instructions? */
759 #define MODE_BASE_REG_CLASS(MODE) GENERAL_REGS
760
761 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
762 and check its validity for a certain class.
763 We have two alternate definitions for each of them.
764 The usual definition accepts all pseudo regs; the other rejects
765 them unless they have been allocated suitable hard regs.
766 The symbol REG_OK_STRICT causes the latter definition to be used.
767
768 Most source files want to accept pseudo regs in the hope that
769 they will get allocated to the class that the insn wants them to be in.
770 Source files for reload pass need to be strict.
771 After reload, it makes no difference, since pseudo regs have
772 been eliminated by then.
773
774 The reg_renumber is used to map pseudo regs into hardware
775 regs, it is set up as a result of register allocation. */
776 #ifdef REG_OK_STRICT
777 #define REGNO_OK_FOR_BASE_P(REGNO) \
778 (CSKY_GENERAL_REGNO_P (REGNO) \
779 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) )
780 #else
781 #define REGNO_OK_FOR_BASE_P(REGNO) \
782 (CSKY_GENERAL_REGNO_P (REGNO) \
783 || (REGNO) >= FIRST_PSEUDO_REGISTER)
784 #endif
785
786
787 #ifdef REG_OK_STRICT
788 #define REGNO_OK_FOR_INDEX_P(REGNO) \
789 (CSKY_GENERAL_REGNO_P (REGNO) \
790 || CSKY_GENERAL_REGNO_P (reg_renumber[(REGNO)]) )
791 #else
792 #define REGNO_OK_FOR_INDEX_P(REGNO) \
793 (CSKY_GENERAL_REGNO_P (REGNO) \
794 || (REGNO) >= FIRST_PSEUDO_REGISTER)
795 #endif
796
797
798 /******************************************************************
799 * Addressing Modes *
800 ******************************************************************/
801
802
803 /* Recognize any constant value that is a valid address. */
804 #define CONSTANT_ADDRESS_P(X) \
805 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF)
806
807 /* Maximum number of registers that can appear in a valid memory address.
808 Shifts in addresses can't be by a register. */
809 #define MAX_REGS_PER_ADDRESS 2
810
811
812 /******************************************************************
813 * Run-time Target *
814 ******************************************************************/
815
816
817 #define TARGET_CPU_CPP_BUILTINS() \
818 csky_cpu_cpp_builtins (pfile)
819
820 /******************************************************************
821 * Per-function Data *
822 ******************************************************************/
823
824
825 /* Initialize data used by insn expanders. This is called from insn_emit,
826 once for every function before code is generated. */
827 #define INIT_EXPANDERS csky_init_expanders ()
828
829
830 /******************************************************************
831 * Dividing the Output into Sections (Texts, Data, . . . ) *
832 ******************************************************************/
833
834
835 /* Switch to the text or data segment. */
836 #define TEXT_SECTION_ASM_OP "\t.text"
837 #define DATA_SECTION_ASM_OP "\t.data"
838
839 /* The subroutine calls in the .init and .fini sections create literal
840 pools which must be jumped around... */
841 #define FORCE_CODE_SECTION_ALIGN \
842 asm ("br 1f ; .literals ; .align 2 ; 1:");
843
844 /* Define this macro to be an expression with a nonzero value if
845 jump tables (for tablejump insns) should be output in the text section,
846 along with the assembler instructions. */
847 #define JUMP_TABLES_IN_TEXT_SECTION TARGET_CASESI
848
849
850 /******************************************************************
851 * Assembler Format *
852 ******************************************************************/
853
854
855 /* A C string constant for text to be output before(after) each asm
856 statement or group of consecutive ones. */
857 #undef ASM_APP_ON
858 #define ASM_APP_ON "// inline asm begin\n"
859 #undef ASM_APP_OFF
860 #define ASM_APP_OFF "// inline asm end\n"
861
862 /* A C string constant describing how to begin a comment in the target
863 assembler language. */
864 #define ASM_COMMENT_START "\t//"
865
866 /* This says how to output an assembler line
867 to define a global common symbol, with alignment information. */
868 #undef ASM_OUTPUT_ALIGNED_COMMON
869 #define ASM_OUTPUT_ALIGNED_COMMON(STREAM, NAME, SIZE, ALIGN) \
870 do \
871 { \
872 fputs ("\t.comm\t", STREAM); \
873 assemble_name (STREAM, NAME); \
874 fprintf (STREAM, ",%lu, %u\n", (unsigned long)(SIZE), \
875 (ALIGN) / BITS_PER_UNIT); \
876 } \
877 while (0)
878
879 /* Define a local common symbol whose alignment we wish to specify.
880 ALIGN comes in as bits, we have to turn it into bytes. */
881 #undef ASM_OUTPUT_ALIGNED_LOCAL
882 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \
883 do \
884 { \
885 fputs ("\t.bss\t", (STREAM)); \
886 assemble_name ((STREAM), (NAME)); \
887 fprintf ((STREAM), ",%d, %d\n", (int)(SIZE), \
888 (ALIGN) / BITS_PER_UNIT); \
889 } \
890 while (0)
891
892 /* Globalizing directive for a label. */
893 #define GLOBAL_ASM_OP "\t.global\t"
894
895 /* Output a reference to a label. */
896 #undef ASM_OUTPUT_LABELREF
897 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
898 fprintf (STREAM, "%s%s", user_label_prefix, \
899 (* targetm.strip_name_encoding) (NAME))
900
901 /* Make an internal label into a string. */
902 #undef ASM_GENERATE_INTERNAL_LABEL
903 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \
904 sprintf (STRING, "*.%s%ld", PREFIX, (long) NUM)
905
906 /* This is how to output an insn to push a register on the stack.
907 It need not be very fast code. */
908 #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
909 fprintf (STREAM, "\tsubi\t %s,%d\n\tst.w\t %s,(%s)\n", \
910 reg_names[STACK_POINTER_REGNUM], \
911 (STACK_BOUNDARY / BITS_PER_UNIT), \
912 reg_names[REGNO], \
913 reg_names[STACK_POINTER_REGNUM])
914
915 /* This is how to output an insn to pop a register from the stack. */
916 #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
917 fprintf (STREAM, "\tld.w\t %s,(%s)\n\taddi\t %s,%d\n", \
918 reg_names[REGNO], \
919 reg_names[STACK_POINTER_REGNUM], \
920 reg_names[STACK_POINTER_REGNUM], \
921 (STACK_BOUNDARY / BITS_PER_UNIT))
922
923 /* Output an element of a dispatch table. */
924 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM,VALUE) \
925 fprintf (STREAM, "\t.long\t.L%d\n", VALUE)
926
927 /* This is how to output an assembler line
928 that says to advance the location counter by SIZE bytes. */
929 #undef ASM_OUTPUT_SKIP
930 #define ASM_OUTPUT_SKIP(STREAM,SIZE) \
931 fprintf (STREAM, "\t.fill %d, 1\n", (int)(SIZE))
932
933 /* Align output to a power of two. Note ".align 0" is redundant,
934 and also GAS will treat it as ".align 2" which we do not want. */
935 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
936 do \
937 { \
938 if ((POWER) > 0) \
939 fprintf (STREAM, "\t.align\t%d\n", POWER); \
940 } \
941 while (0)
942
943
944 /******************************************************************
945 * Controlling the Compilation Driver *
946 ******************************************************************/
947
948
949 /* Define this macro as a C expression for the initializer of an
950 array of string to tell the driver program which options are
951 defaults for this target and thus do not need to be handled
952 specially when using MULTILIB_OPTIONS. */
953 #undef MULTILIB_DEFAULTS
954 #define MULTILIB_DEFAULTS \
955 {"mlittle-endian", "mcpu=ck810f", "mfloat-abi=soft"}
956
957 /* Support for a compile-time default CPU, et cetera. The rules are:
958 --with-arch is ignored if -march or -mcpu are specified.
959 --with-cpu is ignored if -march or -mcpu are specified, and is overridden
960 by --with-arch. */
961 #define OPTION_DEFAULT_SPECS \
962 {"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" }, \
963 {"cpu", "%{!march=*:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
964 {"endian", "%{!mbig-endian:%{!mlittle-endian:-m%(VALUE)-endian}}" }, \
965 {"float", "%{!mfloat-abi=*:-mfloat-abi=%(VALUE)}" },
966
967
968 /******************************************************************
969 * Position Independent Code *
970 ******************************************************************/
971
972 /* Define the global table register. */
973 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? CSKY_GB_REGNUM : INVALID_REGNUM)
974
975 /* Nonzero if x is a legitimate immediate operand on the target machine
976 when generating position-independent code. */
977 #define LEGITIMATE_PIC_OPERAND_P(X) \
978 csky_legitimate_pic_operand_p (X)
979
980
981 /******************************************************************
982 * Controlling Debugging Information Format *
983 ******************************************************************/
984
985
986 /* Define this macro if GCC should produce dwarf version 2 format debugging
987 output in response to the `-g' option. */
988 #define DWARF2_DEBUGGING_INFO 1
989
990 /* Define this macro to 0 if your target supports DWARF 2 frame unwind
991 information, but it does not yet work with exception handling. */
992 #define DWARF2_UNWIND_INFO 1
993
994 /* Define this if you have arranged for GCC to support
995 more than one format of debugging output.
996 The value of this macro only affects the default debugging output. */
997 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
998
999 /* Define this macro if the target’s representation
1000 for dwarf registers used in .eh_frame or .debug_frame
1001 is different from that used in other debug info sections.
1002 Given a GCC hard register number,
1003 this macro should return the .eh_frame register number.*/
1004 #define DWARF_FRAME_REGNUM(REG) DEBUGGER_REGNO (REG)
1005
1006 /* If INCOMING_RETURN_ADDR_RTX is defined & the RTL is REG,
1007 define DWARF_FRAME_RETURN_COLUMN to DWARF_FRAME_REGNUM. */
1008 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CSKY_LR_REGNUM)
1009
1010 /* Use r0 and r1 to pass exception handling information. */
1011 #define EH_RETURN_DATA_REGNO(N) ((N) < 2 ? N : INVALID_REGNUM)
1012
1013 /* How to renumber registers for gdb. */
1014 extern const int csky_debugger_regno[];
1015 #define DEBUGGER_REGNO(REGNO) ((unsigned int) csky_debugger_regno[REGNO])
1016
1017
1018 /******************************************************************
1019 * Miscellaneous Parameters *
1020 ******************************************************************/
1021
1022
1023 /* Specify the machine mode that this machine uses
1024 for the index in the tablejump instruction. */
1025 #define CASE_VECTOR_MODE SImode
1026
1027 /* Define if operations between registers always perform the operation
1028 on the full register even if a narrower mode is specified. */
1029 #define WORD_REGISTER_OPERATIONS 1
1030
1031 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1032 will either zero-extend or sign-extend. The value of this macro should
1033 be the code that says which one of the two operations is implicitly
1034 done, UNKNOWN if none. */
1035 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1036
1037 /* Max number of bytes we can move from memory to memory
1038 in one reasonably fast instruction. */
1039 #define MOVE_MAX 4
1040
1041 /* Shift counts are truncated to 6-bits (0 to 63) instead of the expected
1042 5-bits, so we cannot define SHIFT_COUNT_TRUNCATED to true for this
1043 target. */
1044 #define SHIFT_COUNT_TRUNCATED 0
1045
1046 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 32, 1)
1047
1048 /* The machine modes of pointers and functions. */
1049 #define Pmode SImode
1050 #define FUNCTION_MODE Pmode
1051
1052 /* Define this macro to be a C expression to indicate when jump-tables
1053 should contain relative addresses. */
1054 #define CASE_VECTOR_PC_RELATIVE \
1055 (optimize_size && TARGET_CONSTANT_POOL \
1056 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801)))
1057
1058 /* Return the preferred mode for an addr_diff_vec when the minimum
1059 and maximum offset are known. */
1060 #define CASE_VECTOR_SHORTEN_MODE(min, max, body) \
1061 (min >= 0 && max < 512 \
1062 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, QImode) \
1063 : min >= -256 && max < 256 \
1064 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, QImode) \
1065 : min >= 0 && max < 8192 \
1066 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, HImode) \
1067 : min >= -4096 && max < 4096 \
1068 ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, HImode) \
1069 : SImode)
1070
1071 /* This is how to output an element of a case-vector that is relative. */
1072 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
1073 do \
1074 { \
1075 if (optimize_size && TARGET_CONSTANT_POOL \
1076 && (CSKY_TARGET_ARCH (CK802) || CSKY_TARGET_ARCH (CK801))) \
1077 { \
1078 switch (GET_MODE (BODY)) \
1079 { \
1080 case E_QImode: \
1081 asm_fprintf (STREAM, "\t.byte\t(.L%d-.L%d)/2\n", \
1082 VALUE, REL); \
1083 break; \
1084 case E_HImode: /* TBH */ \
1085 asm_fprintf (STREAM, "\t.short\t(.L%d-.L%d)/2\n", \
1086 VALUE, REL); \
1087 break; \
1088 case E_SImode: \
1089 asm_fprintf (STREAM, "\t.long\t.L%d-.L%d\n", \
1090 VALUE, REL); \
1091 break; \
1092 default: \
1093 gcc_unreachable (); \
1094 } \
1095 } \
1096 else \
1097 asm_fprintf (STREAM, "\t.long\t.L%d@GOTOFF\n", VALUE); \
1098 } while (0)
1099
1100 /* This macro is not documented yet.
1101 But we do need it to make jump table vector aligned. */
1102 #define ADDR_VEC_ALIGN(JUMPTABLE) 0
1103
1104 /* We have to undef this first to override the version from elfos.h. */
1105 #undef ASM_OUTPUT_CASE_LABEL
1106 #define ASM_OUTPUT_CASE_LABEL(stream, prefix, num, table) \
1107 do \
1108 { \
1109 if (GET_MODE (PATTERN (table)) == SImode) \
1110 ASM_OUTPUT_ALIGN (stream, 2); \
1111 (*targetm.asm_out.internal_label) (stream, prefix, num); \
1112 } while (0)
1113
1114 /* Make sure subsequent insns are aligned after a byte-sized jump offset
1115 table. */
1116 #define ASM_OUTPUT_CASE_END(stream, num, table) \
1117 do \
1118 { \
1119 if (GET_MODE (PATTERN (table)) == QImode) \
1120 ASM_OUTPUT_ALIGN (stream, 1); \
1121 } while (0)
1122
1123
1124
1125
1126 /******************************************************************
1127 * Trampolines for Nested Functions *
1128 ******************************************************************/
1129
1130
1131 /* Length in units of the trampoline for entering a nested function. */
1132 #define TRAMPOLINE_SIZE (CSKY_ISA_FEATURE (2E3) ? 16 : 20)
1133
1134 /* Alignment required for a trampoline in bits. */
1135 #define TRAMPOLINE_ALIGNMENT 32
1136
1137
1138 /******************************************************************
1139 * Describing Relative Costs of Operations *
1140 ******************************************************************/
1141
1142
1143 /* Nonzero if access to memory by bytes is slow and undesirable.
1144 For RISC chips, it means that access to memory by bytes is no
1145 better than access by words when possible, so grab a whole word
1146 and maybe make use of that. */
1147 #define SLOW_BYTE_ACCESS 0
1148
1149 /* On C-SKY, function CSE would allow use of 16-bit jsr instructions
1150 instead of normal 32-bit calls. But it also needs a separate constant
1151 pool entry for the function address and an instruction to load it, and
1152 may cause additional spills due to increased register pressure, etc.
1153 It doesn't seem like a good idea overall. */
1154 #define NO_FUNCTION_CSE 1
1155
1156 /* Try to generate sequences that don't involve branches, we can then use
1157 conditional instructions. */
1158 #define BRANCH_COST(speed_p, predictable_p) \
1159 csky_default_branch_cost (speed_p, predictable_p)
1160
1161 /* False if short circuit operation is preferred. */
1162 #define LOGICAL_OP_NON_SHORT_CIRCUIT \
1163 (csky_default_logical_op_non_short_circuit ())
1164
1165
1166 /******************************************************************
1167 * Generating Code for Profiling *
1168 ******************************************************************/
1169
1170
1171 #define FUNCTION_PROFILER(FILE, LABELNO)
1172
1173 #endif /* GCC_CSKY_H */