1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998-2023 Free Software Foundation, Inc.
4 Contributed by Denis Chertykov (chertykov@gmail.com)
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
11 any later version.
12
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 typedef struct
23 {
24 /* Id of the address space as used in c_register_addr_space */
25 unsigned char id;
26
27 /* Flavour of memory: 0 = RAM, 1 = Flash */
28 int memory_class;
29
30 /* Width of pointer (in bytes) */
31 int pointer_size;
32
33 /* Name of the address space as visible to the user */
34 const char *name;
35
36 /* Segment (i.e. 64k memory chunk) number. */
37 int segment;
38
39 /* Section prefix, e.g. ".progmem1.data" */
40 const char *section_name;
41 } avr_addrspace_t;
42
43 extern const avr_addrspace_t avr_addrspace[];
44
45 /* Known address spaces */
46
47 enum
48 {
49 ADDR_SPACE_RAM, /* ADDR_SPACE_GENERIC */
50 ADDR_SPACE_FLASH,
51 ADDR_SPACE_FLASH1,
52 ADDR_SPACE_FLASH2,
53 ADDR_SPACE_FLASH3,
54 ADDR_SPACE_FLASH4,
55 ADDR_SPACE_FLASH5,
56 ADDR_SPACE_MEMX,
57 /* Sentinel */
58 ADDR_SPACE_COUNT
59 };
60
61 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile)
62
63 #define AVR_SHORT_CALLS (TARGET_SHORT_CALLS \
64 && avr_arch == &avr_arch_types[ARCH_AVRXMEGA3])
65 #define AVR_HAVE_JMP_CALL (avr_arch->have_jmp_call && ! AVR_SHORT_CALLS)
66 #define AVR_HAVE_MUL (avr_arch->have_mul)
67 #define AVR_HAVE_MOVW (avr_arch->have_movw_lpmx)
68 #define AVR_HAVE_LPM (!AVR_TINY)
69 #define AVR_HAVE_LPMX (avr_arch->have_movw_lpmx)
70 #define AVR_HAVE_ELPM (avr_arch->have_elpm)
71 #define AVR_HAVE_ELPMX (avr_arch->have_elpmx)
72 #define AVR_HAVE_RAMPD (avr_arch->have_rampd)
73 #define AVR_HAVE_RAMPX (avr_arch->have_rampd)
74 #define AVR_HAVE_RAMPY (avr_arch->have_rampd)
75 #define AVR_HAVE_RAMPZ (avr_arch->have_elpm \
76 || avr_arch->have_rampd)
77 #define AVR_HAVE_EIJMP_EICALL (avr_arch->have_eijmp_eicall)
78
79 /* Handling of 8-bit SP versus 16-bit SP is as follows:
80
81 FIXME: DRIVER_SELF_SPECS has changed.
82 -msp8 is used internally to select the right multilib for targets with
83 8-bit SP. -msp8 is set automatically by DRIVER_SELF_SPECS for devices
84 with 8-bit SP or by multilib generation machinery. If a frame pointer is
85 needed and SP is only 8 bits wide, SP is zero-extended to get FP.
86
87 TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option.
88 This option has no effect on multilib selection. It serves to save some
89 bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone.
90
91 These two properties are reflected by built-in macros __AVR_SP8__ resp.
92 __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__. During multilib generation
93 there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__. */
94
95 #define AVR_HAVE_8BIT_SP \
96 (TARGET_TINY_STACK || avr_sp8)
97
98 #define AVR_HAVE_SPH (!avr_sp8)
99
100 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
101 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
102
103 #define AVR_XMEGA (avr_arch->xmega_p)
104 #define AVR_TINY (avr_arch->tiny_p)
105
106 #define BITS_BIG_ENDIAN 0
107 #define BYTES_BIG_ENDIAN 0
108 #define WORDS_BIG_ENDIAN 0
109
110 #define FLOAT_LIB_COMPARE_RETURNS_BOOL(mode, comparison) \
111 avr_float_lib_compare_returns_bool (mode, comparison)
112
113 #ifdef IN_LIBGCC2
114 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
115 #define UNITS_PER_WORD 4
116 #else
117 /* Width of a word, in units (bytes). */
118 #define UNITS_PER_WORD 1
119 #endif
120
121 #define POINTER_SIZE 16
122
123
124 /* Maximum sized of reasonable data type
125 DImode or Dfmode ... */
126 #define MAX_FIXED_MODE_SIZE 32
127
128 #define PARM_BOUNDARY 8
129
130 #define FUNCTION_BOUNDARY 8
131
132 #define EMPTY_FIELD_BOUNDARY 8
133
134 /* No data type wants to be aligned rounder than this. */
135 #define BIGGEST_ALIGNMENT 8
136
137 #define TARGET_VTABLE_ENTRY_ALIGN 8
138
139 #define STRICT_ALIGNMENT 0
140
141 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
142 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
143 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
144 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
145 #define FLOAT_TYPE_SIZE 32
146 #define DOUBLE_TYPE_SIZE (avr_double)
147 #define LONG_DOUBLE_TYPE_SIZE (avr_long_double)
148
149 #define LONG_LONG_ACCUM_TYPE_SIZE 64
150
151 #define DEFAULT_SIGNED_CHAR 1
152
153 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
154 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
155
156 #define WCHAR_TYPE_SIZE 16
157
158 #define FIRST_PSEUDO_REGISTER 37
159
160 #define GENERAL_REGNO_P(N) IN_RANGE (N, 2, 31)
161 #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
162
163 #define FIXED_REGISTERS {\
164 1,1,/* r0 r1 */\
165 0,0,/* r2 r3 */\
166 0,0,/* r4 r5 */\
167 0,0,/* r6 r7 */\
168 0,0,/* r8 r9 */\
169 0,0,/* r10 r11 */\
170 0,0,/* r12 r13 */\
171 0,0,/* r14 r15 */\
172 0,0,/* r16 r17 */\
173 0,0,/* r18 r19 */\
174 0,0,/* r20 r21 */\
175 0,0,/* r22 r23 */\
176 0,0,/* r24 r25 */\
177 0,0,/* r26 r27 */\
178 0,0,/* r28 r29 */\
179 0,0,/* r30 r31 */\
180 1,1,/* STACK */\
181 1,1, /* arg pointer */ \
182 1 /* CC */ }
183
184 #define CALL_USED_REGISTERS { \
185 1,1,/* r0 r1 */ \
186 0,0,/* r2 r3 */ \
187 0,0,/* r4 r5 */ \
188 0,0,/* r6 r7 */ \
189 0,0,/* r8 r9 */ \
190 0,0,/* r10 r11 */ \
191 0,0,/* r12 r13 */ \
192 0,0,/* r14 r15 */ \
193 0,0,/* r16 r17 */ \
194 1,1,/* r18 r19 */ \
195 1,1,/* r20 r21 */ \
196 1,1,/* r22 r23 */ \
197 1,1,/* r24 r25 */ \
198 1,1,/* r26 r27 */ \
199 0,0,/* r28 r29 */ \
200 1,1,/* r30 r31 */ \
201 1,1,/* STACK */ \
202 1,1, /* arg pointer */ \
203 1 /* CC */ }
204
205 #define REG_ALLOC_ORDER { \
206 24,25, \
207 18,19, \
208 20,21, \
209 22,23, \
210 30,31, \
211 26,27, \
212 28,29, \
213 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
214 0,1, \
215 32,33,34,35,36 \
216 }
217
218 #define ADJUST_REG_ALLOC_ORDER avr_adjust_reg_alloc_order()
219
220
221 enum reg_class {
222 NO_REGS,
223 R0_REG, /* r0 */
224 POINTER_X_REGS, /* r26 - r27 */
225 POINTER_Y_REGS, /* r28 - r29 */
226 POINTER_Z_REGS, /* r30 - r31 */
227 STACK_REG, /* STACK */
228 BASE_POINTER_REGS, /* r28 - r31 */
229 POINTER_REGS, /* r26 - r31 */
230 ADDW_REGS, /* r24 - r31 */
231 SIMPLE_LD_REGS, /* r16 - r23 */
232 LD_REGS, /* r16 - r31 */
233 NO_LD_REGS, /* r0 - r15 */
234 GENERAL_REGS, /* r0 - r31 */
235 CC_REG, /* CC */
236 ALL_REGS, LIM_REG_CLASSES
237 };
238
239
240 #define N_REG_CLASSES (int)LIM_REG_CLASSES
241
242 #define REG_CLASS_NAMES { \
243 "NO_REGS", \
244 "R0_REG", /* r0 */ \
245 "POINTER_X_REGS", /* r26 - r27 */ \
246 "POINTER_Y_REGS", /* r28 - r29 */ \
247 "POINTER_Z_REGS", /* r30 - r31 */ \
248 "STACK_REG", /* STACK */ \
249 "BASE_POINTER_REGS", /* r28 - r31 */ \
250 "POINTER_REGS", /* r26 - r31 */ \
251 "ADDW_REGS", /* r24 - r31 */ \
252 "SIMPLE_LD_REGS", /* r16 - r23 */ \
253 "LD_REGS", /* r16 - r31 */ \
254 "NO_LD_REGS", /* r0 - r15 */ \
255 "GENERAL_REGS", /* r0 - r31 */ \
256 "CC_REG", /* CC */ \
257 "ALL_REGS" }
258
259 #define REG_CLASS_CONTENTS { \
260 {0x00000000,0x00000000}, /* NO_REGS */ \
261 {0x00000001,0x00000000}, /* R0_REG */ \
262 {3u << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
263 {3u << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
264 {3u << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
265 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
266 {(3u << REG_Y) | (3u << REG_Z), \
267 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
268 {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z), \
269 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
270 {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z) | (3u << REG_W), \
271 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
272 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
273 {(3u << REG_X)|(3u << REG_Y)|(3u << REG_Z)|(3u << REG_W)|(0xffu << 16),\
274 0x00000000}, /* LD_REGS, r16 - r31 */ \
275 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
276 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
277 {0x00000000,0x00000010}, /* CC */ \
278 {0xffffffff,0x00000013} /* ALL_REGS */ \
279 }
280
281 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
282
283 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code) \
284 avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
285
286 #define INDEX_REG_CLASS NO_REGS
287
288 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
289 avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
290
291 #define REGNO_OK_FOR_INDEX_P(NUM) 0
292
293 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
294
295 #define STACK_PUSH_CODE POST_DEC
296
297 #define STACK_GROWS_DOWNWARD 1
298
299 #define STACK_POINTER_OFFSET 1
300
301 #define FIRST_PARM_OFFSET(FUNDECL) 0
302
303 #define STACK_BOUNDARY 8
304
305 #define STACK_POINTER_REGNUM 32
306
307 #define FRAME_POINTER_REGNUM REG_Y
308
309 #define ARG_POINTER_REGNUM 34
310
311 #define STATIC_CHAIN_REGNUM ((AVR_TINY) ? 18 :2)
312
313 #define ELIMINABLE_REGS { \
314 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
315 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
316 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
317 { FRAME_POINTER_REGNUM + 1, STACK_POINTER_REGNUM + 1 } }
318
319 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
320 OFFSET = avr_initial_elimination_offset (FROM, TO)
321
322 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
323
324 /* Don't use Push rounding. expr.cc: emit_single_push_insn is broken
325 for POST_DEC targets (PR27386). */
326 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
327
328 typedef struct avr_args
329 {
330 /* # Registers available for passing */
331 int nregs;
332
333 /* Next available register number */
334 int regno;
335 } CUMULATIVE_ARGS;
336
337 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
338 avr_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
339
340 #define FUNCTION_ARG_REGNO_P(r) avr_function_arg_regno_p(r)
341
342 #define DEFAULT_PCC_STRUCT_RETURN 0
343
344 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
345
346 #define HAVE_POST_INCREMENT 1
347 #define HAVE_PRE_DECREMENT 1
348
349 #define MAX_REGS_PER_ADDRESS 1
350
351 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
352 do { \
353 rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
354 ADDR_TYPE (TYPE), \
355 IND_L, make_memloc); \
356 if (new_x) \
357 { \
358 X = new_x; \
359 goto WIN; \
360 } \
361 } while (0)
362
363 /* We increase branch costs after reload in order to keep basic-block
364 reordering from introducing out-of-line jumps and to prefer fall-through
365 edges instead. The default branch costs are 0, mainly because otherwise
366 do_store_flag might come up with bloated code. */
367 #define BRANCH_COST(speed_p, predictable_p) \
368 (avr_branch_cost + (reload_completed ? 4 : 0))
369
370 #define SLOW_BYTE_ACCESS 0
371
372 #define NO_FUNCTION_CSE 1
373
374 #define REGISTER_TARGET_PRAGMAS() \
375 do { \
376 avr_register_target_pragmas(); \
377 } while (0)
378
379 #define TEXT_SECTION_ASM_OP "\t.text"
380
381 #define DATA_SECTION_ASM_OP "\t.data"
382
383 #define BSS_SECTION_ASM_OP "\t.section .bss"
384
385 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
386 There are no shared libraries on this target, and these sections are
387 placed in the read-only program memory, so they are not writable. */
388
389 #undef CTORS_SECTION_ASM_OP
390 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
391
392 #undef DTORS_SECTION_ASM_OP
393 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
394
395 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
396
397 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
398
399 #define SUPPORTS_INIT_PRIORITY 0
400
401 /* We pretend jump tables are in text section because otherwise,
402 final.cc will switch to .rodata before jump tables and thereby
403 triggers __do_copy_data. As we implement ASM_OUTPUT_ADDR_VEC,
404 we still have full control over the jump tables themselves. */
405 #define JUMP_TABLES_IN_TEXT_SECTION 1
406
407 #define ASM_COMMENT_START " ; "
408
409 #define ASM_APP_ON "/* #APP */\n"
410
411 #define ASM_APP_OFF "/* #NOAPP */\n"
412
413 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
414
415 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
416 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
417
418 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
419 avr_asm_asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN, \
420 asm_output_aligned_bss)
421
422 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
423 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
424
425 /* Globalizing directive for a label. */
426 #define GLOBAL_ASM_OP ".global\t"
427
428 #define SUPPORTS_WEAK 1
429
430 #define HAS_INIT_SECTION 1
431
432 #define REGISTER_NAMES { \
433 "r0","r1","r2","r3","r4","r5","r6","r7", \
434 "r8","r9","r10","r11","r12","r13","r14","r15", \
435 "r16","r17","r18","r19","r20","r21","r22","r23", \
436 "r24","r25","r26","r27","r28","r29","r30","r31", \
437 "__SP_L__","__SP_H__","argL","argH", "cc"}
438
439 #define FINAL_PRESCAN_INSN(insn, operand, nop) \
440 avr_final_prescan_insn (insn, operand,nop)
441
442 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
443 { \
444 gcc_assert (REGNO < 32); \
445 fprintf (STREAM, "\tpush\tr%d", REGNO); \
446 }
447
448 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
449 { \
450 gcc_assert (REGNO < 32); \
451 fprintf (STREAM, "\tpop\tr%d", REGNO); \
452 }
453
454 #define ASM_OUTPUT_ADDR_VEC(TLABEL, TDATA) \
455 avr_output_addr_vec (TLABEL, TDATA)
456
457 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
458 do { \
459 if ((POWER) > 0) \
460 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
461 } while (0)
462
463 #define CASE_VECTOR_MODE HImode
464
465 #undef WORD_REGISTER_OPERATIONS
466
467 /* Can move only a single byte from memory to reg in a
468 single instruction. */
469
470 #define MOVE_MAX 1
471
472 /* Allow upto two bytes moves to occur using by_pieces
473 infrastructure */
474
475 #define MOVE_MAX_PIECES 2
476
477 /* Set MOVE_RATIO to 3 to allow memory moves upto 4 bytes to happen
478 by pieces when optimizing for speed, like it did when MOVE_MAX_PIECES
479 was 4. When optimizing for size, allow memory moves upto 2 bytes.
480 Also see avr_use_by_pieces_infrastructure_p. */
481
482 #define MOVE_RATIO(speed) ((speed) ? 3 : 2)
483
484 #define Pmode HImode
485
486 #define FUNCTION_MODE HImode
487
488 #define DOLLARS_IN_IDENTIFIERS 0
489
490 #define TRAMPOLINE_SIZE 4
491
492 /* Output assembler code to FILE to increment profiler label # LABELNO
493 for profiling a function entry. */
494
495 #define FUNCTION_PROFILER(FILE, LABELNO) \
496 fprintf (FILE, "/* profiler %d */", (LABELNO))
497
498 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
499 (LENGTH = avr_adjust_insn_length (INSN, LENGTH))
500
501 extern const char *avr_devicespecs_file (int, const char**);
502 extern const char *avr_double_lib (int, const char**);
503
504 #define EXTRA_SPEC_FUNCTIONS \
505 { "double-lib", avr_double_lib }, \
506 { "device-specs-file", avr_devicespecs_file },
507
508 /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs.
509 Apply '%s' to a static string to inflate the file (directory) name which
510 is used to diagnose problems with reading the specs file. */
511
512 #undef DRIVER_SELF_SPECS
513 #define DRIVER_SELF_SPECS \
514 " %:double-lib(%{m*:m%*})" \
515 " %:device-specs-file(device-specs%s %{mmcu=*:%*})"
516
517 /* No libstdc++ for now. Empty string doesn't work. */
518 #define LIBSTDCXX "gcc"
519
520 /* This is the default without any -mmcu=* option. */
521 #define MULTILIB_DEFAULTS { "mmcu=" AVR_MMCU_DEFAULT }
522
523 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
524 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
525
526 #define CR_TAB "\n\t"
527
528 #define DWARF2_ADDR_SIZE 4
529
530 #define INCOMING_RETURN_ADDR_RTX avr_incoming_return_addr_rtx ()
531 #define INCOMING_FRAME_SP_OFFSET (AVR_3_BYTE_PC ? 3 : 2)
532
533 /* The caller's stack pointer value immediately before the call
534 is one byte below the first argument. */
535 #define ARG_POINTER_CFA_OFFSET(FNDECL) -1
536
537 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
538 avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
539
540 /* A C structure for machine-specific, per-function data.
541 This is added to the cfun structure. */
542 struct GTY(()) machine_function
543 {
544 /* 'true' - if current function is a naked function. */
545 int is_naked;
546
547 /* 'true' - if current function is an interrupt function
548 as specified by the "interrupt" attribute. */
549 int is_interrupt;
550
551 /* 'true' - if current function is a signal function
552 as specified by the "signal" attribute. */
553 int is_signal;
554
555 /* 'true' - if current function is a 'task' function
556 as specified by the "OS_task" attribute. */
557 int is_OS_task;
558
559 /* 'true' - if current function is a 'main' function
560 as specified by the "OS_main" attribute. */
561 int is_OS_main;
562
563 /* Current function stack size. */
564 int stack_usage;
565
566 /* 'true' if a callee might be tail called */
567 int sibcall_fails;
568
569 /* 'true' if the above is_foo predicates are sanity-checked to avoid
570 multiple diagnose for the same function. */
571 int attributes_checked_p;
572
573 /* 'true' - if current function shall not use '__gcc_isr' pseudo
574 instructions as specified by the "no_gccisr" attribute. */
575 int is_no_gccisr;
576
577 /* Used for `__gcc_isr' pseudo instruction handling of
578 non-naked ISR prologue / epilogue(s). */
579 struct
580 {
581 /* 'true' if this function actually uses "*gasisr" insns. */
582 int yes;
583 /* 'true' if this function is allowed to use "*gasisr" insns. */
584 int maybe;
585 /* The register numer as printed by the Done chunk. */
586 int regno;
587 } gasisr;
588
589 /* 'true' if this function references .L__stack_usage like with
590 __builtin_return_address. */
591 int use_L__stack_usage;
592 };
593
594 /* AVR does not round pushes, but the existence of this macro is
595 required in order for pushes to be generated. */
596 #define PUSH_ROUNDING(X) (X)
597
598 /* Define prototype here to avoid build warning. Some files using
599 ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include
600 tm.h but not tm_p.h. */
601 extern int avr_accumulate_outgoing_args (void);
602 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
603
604 #define INIT_EXPANDERS avr_init_expanders()
605
606 /* Flags used for io and address attributes. */
607 #define SYMBOL_FLAG_IO_LOW (SYMBOL_FLAG_MACH_DEP << 4)
608 #define SYMBOL_FLAG_IO (SYMBOL_FLAG_MACH_DEP << 5)
609 #define SYMBOL_FLAG_ADDRESS (SYMBOL_FLAG_MACH_DEP << 6)