1  /* GCC option-handling definitions for the Synopsys DesignWare ARC architecture.
       2  
       3     Copyright (C) 2007-2023 Free Software Foundation, Inc.
       4  
       5     This file is part of GCC.
       6  
       7     GCC is free software; you can redistribute it and/or modify it
       8     under the terms of the GNU General Public License as published
       9     by the Free Software Foundation; either version 3, or (at your
      10     option) any later version.
      11  
      12     GCC is distributed in the hope that it will be useful, but WITHOUT
      13     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
      14     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
      15     License for more details.
      16  
      17     You should have received a copy of the GNU General Public License
      18     along with GCC; see the file COPYING3.  If not see
      19     <http://www.gnu.org/licenses/>.  */
      20  
      21  #ifndef ARC_OPTS_H
      22  #define ARC_OPTS_H
      23  
      24  enum processor_type
      25  {
      26    PROCESSOR_NONE = 0,
      27  #define ARC_CPU(NAME, ARCH, FLAGS, EXTRA, TUNE)  PROCESSOR_##NAME,
      28  #include "arc-cpus.def"
      29  #undef ARC_CPU
      30    PROCESSOR_generic
      31  };
      32  
      33  /* Single precision floating point.  */
      34  #define FPU_SP    0x0001
      35  /* Single precision fused floating point operations.  */
      36  #define FPU_SF    0x0002
      37  /* Single precision floating point format conversion operations.  */
      38  #define FPU_SC    0x0004
      39  /* Single precision floating point sqrt and div operations.  */
      40  #define FPU_SD    0x0008
      41  /* Double precision floating point.  */
      42  #define FPU_DP    0x0010
      43  /* Double precision fused floating point operations.  */
      44  #define FPU_DF    0x0020
      45  /* Double precision floating point format conversion operations.  */
      46  #define FPU_DC    0x0040
      47  /* Double precision floating point sqrt and div operations.  */
      48  #define FPU_DD    0x0080
      49  /* Double precision floating point assist operations.  */
      50  #define FPX_DP    0x0100
      51  /* Quark SE floating point instructions.  */
      52  #define FPX_QK    0x0200
      53  
      54  /* fpus option combi.  */
      55  #define FPU_FPUS  (FPU_SP | FPU_SC)
      56  /* fpud option combi.  */
      57  #define FPU_FPUD  (FPU_SP | FPU_SC | FPU_DP | FPU_DC)
      58  /* fpuda option combi.  */
      59  #define FPU_FPUDA (FPU_SP | FPU_SC | FPX_DP)
      60  /* fpuda_div option combi.  */
      61  #define FPU_FPUDA_DIV (FPU_SP | FPU_SC | FPU_SD | FPX_DP)
      62  /* fpuda_fma option combi.  */
      63  #define FPU_FPUDA_FMA (FPU_SP | FPU_SC | FPU_SF | FPX_DP)
      64  /* fpuda_all option combi.  */
      65  #define FPU_FPUDA_ALL (FPU_SP | FPU_SC | FPU_SF | FPU_SD | FPX_DP)
      66  /* fpus_div option combi.  */
      67  #define FPU_FPUS_DIV  (FPU_SP | FPU_SC | FPU_SD)
      68  /* fpus_fma option combi.  */
      69  #define FPU_FPUS_FMA  (FPU_SP | FPU_SC | FPU_SF)
      70  /* fpus_all option combi.  */
      71  #define FPU_FPUS_ALL  (FPU_SP | FPU_SC | FPU_SF | FPU_SD)
      72  /* fpud_div option combi.  */
      73  #define FPU_FPUD_DIV  (FPU_FPUS_DIV | FPU_DP | FPU_DC | FPU_DD)
      74  /* fpud_fma option combi.  */
      75  #define FPU_FPUD_FMA  (FPU_FPUS_FMA | FPU_DP | FPU_DC | FPU_DF)
      76  /* fpud_all option combi.  */
      77  #define FPU_FPUD_ALL  (FPU_FPUS_ALL | FPU_DP | FPU_DC | FPU_DF | FPU_DD)
      78  
      79  /* Default FPU option value needed to mark if the variable in question
      80     is changed by a command line option or not.  This is required when
      81     we set the cpu's specific configuration.  */
      82  #define DEFAULT_arc_fpu_build 0x10000000
      83  
      84  /* Default MPY option value.  */
      85  #define DEFAULT_arc_mpy_option -1
      86  
      87  #endif /* ARC_OPTS_H */