1  /* Copyright (C) 2011-2023 Free Software Foundation, Inc.
       2     Contributed by ARM Ltd.
       3  
       4     This file is part of GCC.
       5  
       6     GCC is free software; you can redistribute it and/or modify it
       7     under the terms of the GNU General Public License as published
       8     by the Free Software Foundation; either version 3, or (at your
       9     option) any later version.
      10  
      11     GCC is distributed in the hope that it will be useful, but WITHOUT
      12     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
      13     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
      14     License for more details.
      15  
      16     You should have received a copy of the GNU General Public License
      17     along with GCC; see the file COPYING3.  If not see
      18     <http://www.gnu.org/licenses/>.  */
      19  
      20  /* Definitions for option handling for AArch64.  */
      21  
      22  #ifndef GCC_AARCH64_OPTS_H
      23  #define GCC_AARCH64_OPTS_H
      24  
      25  #ifndef USED_FOR_TARGET
      26  typedef uint64_t aarch64_feature_flags;
      27  #endif
      28  
      29  /* The various cores that implement AArch64.  */
      30  enum aarch64_processor
      31  {
      32  #define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \
      33    INTERNAL_IDENT,
      34  #include "aarch64-cores.def"
      35    /* Used to indicate that no processor has been specified.  */
      36    generic,
      37    /* Used to mark the end of the processor table.  */
      38    aarch64_none
      39  };
      40  
      41  enum aarch64_arch
      42  {
      43  #define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
      44    AARCH64_ARCH_##ARCH_IDENT,
      45  #include "aarch64-arches.def"
      46    aarch64_no_arch
      47  };
      48  
      49  /* TLS types.  */
      50  enum aarch64_tls_type {
      51    TLS_TRADITIONAL,
      52    TLS_DESCRIPTORS
      53  };
      54  
      55  /* The code model defines the address generation strategy.
      56     Most have a PIC and non-PIC variant.  */
      57  enum aarch64_code_model {
      58    /* Static code and data fit within a 1MB region.
      59       Not fully implemented, mostly treated as SMALL.  */
      60    AARCH64_CMODEL_TINY,
      61    /* Static code, data and GOT/PLT fit within a 1MB region.
      62       Not fully implemented, mostly treated as SMALL_PIC.  */
      63    AARCH64_CMODEL_TINY_PIC,
      64    /* Static code and data fit within a 4GB region.
      65       The default non-PIC code model.  */
      66    AARCH64_CMODEL_SMALL,
      67    /* Static code, data and GOT/PLT fit within a 4GB region.
      68       The default PIC code model.  */
      69    AARCH64_CMODEL_SMALL_PIC,
      70    /* -fpic for small memory model.
      71       GOT size to 28KiB (4K*8-4K) or 3580 entries.  */
      72    AARCH64_CMODEL_SMALL_SPIC,
      73    /* No assumptions about addresses of code and data.
      74       The PIC variant is not yet implemented.  */
      75    AARCH64_CMODEL_LARGE
      76  };
      77  
      78  /* SVE vector register sizes.  */
      79  enum aarch64_sve_vector_bits_enum {
      80    SVE_SCALABLE,
      81    SVE_NOT_IMPLEMENTED = SVE_SCALABLE,
      82    SVE_128 = 128,
      83    SVE_256 = 256,
      84    SVE_512 = 512,
      85    SVE_1024 = 1024,
      86    SVE_2048 = 2048
      87  };
      88  
      89  /* Where to get the canary for the stack protector.  */
      90  enum stack_protector_guard {
      91    SSP_SYSREG,			/* per-thread canary in special system register */
      92    SSP_GLOBAL			/* global canary */
      93  };
      94  
      95  /* The key type that -msign-return-address should use.  */
      96  enum aarch64_key_type {
      97    AARCH64_KEY_A,
      98    AARCH64_KEY_B
      99  };
     100  
     101  #endif