1  /* Machine description for AArch64 architecture.
       2     Copyright (C) 2009-2023 Free Software Foundation, Inc.
       3     Contributed by ARM Ltd.
       4  
       5     This file is part of GCC.
       6  
       7     GCC is free software; you can redistribute it and/or modify it
       8     under the terms of the GNU General Public License as published by
       9     the Free Software Foundation; either version 3, or (at your option)
      10     any later version.
      11  
      12     GCC is distributed in the hope that it will be useful, but
      13     WITHOUT ANY WARRANTY; without even the implied warranty of
      14     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
      15     General Public License for more details.
      16  
      17     You should have received a copy of the GNU General Public License
      18     along with GCC; see the file COPYING3.  If not see
      19     <http://www.gnu.org/licenses/>.  */
      20  
      21  #ifndef GCC_AARCH64_ELF_H
      22  #define GCC_AARCH64_ELF_H
      23  
      24  
      25  #define ASM_OUTPUT_LABELREF(FILE, NAME) \
      26    aarch64_asm_output_labelref (FILE, NAME)
      27  
      28  #define TEXT_SECTION_ASM_OP	"\t.text"
      29  #define DATA_SECTION_ASM_OP	"\t.data"
      30  #define BSS_SECTION_ASM_OP	"\t.bss"
      31  
      32  #define CTORS_SECTION_ASM_OP "\t.section\t.init_array,\"aw\",%init_array"
      33  #define DTORS_SECTION_ASM_OP "\t.section\t.fini_array,\"aw\",%fini_array"
      34  
      35  #undef INIT_SECTION_ASM_OP
      36  #undef FINI_SECTION_ASM_OP
      37  #define INIT_ARRAY_SECTION_ASM_OP CTORS_SECTION_ASM_OP
      38  #define FINI_ARRAY_SECTION_ASM_OP DTORS_SECTION_ASM_OP
      39  
      40  /* Since we use .init_array/.fini_array we don't need the markers at
      41     the start and end of the ctors/dtors arrays.  */
      42  #define CTOR_LIST_BEGIN asm (CTORS_SECTION_ASM_OP)
      43  #define CTOR_LIST_END		/* empty */
      44  #define DTOR_LIST_BEGIN asm (DTORS_SECTION_ASM_OP)
      45  #define DTOR_LIST_END		/* empty */
      46  
      47  #undef TARGET_ASM_CONSTRUCTOR
      48  #define TARGET_ASM_CONSTRUCTOR aarch64_elf_asm_constructor
      49  
      50  #undef TARGET_ASM_DESTRUCTOR
      51  #define TARGET_ASM_DESTRUCTOR aarch64_elf_asm_destructor
      52  
      53  #ifdef HAVE_GAS_MAX_SKIP_P2ALIGN
      54  /* Support for -falign-* switches.  Use .p2align to ensure that code
      55     sections are padded with NOP instructions, rather than zeros.  */
      56  #define ASM_OUTPUT_MAX_SKIP_ALIGN(FILE, LOG, MAX_SKIP)		\
      57    do								\
      58      {								\
      59        if ((LOG) != 0)						\
      60  	{							\
      61  	  if ((MAX_SKIP) == 0)					\
      62  	    fprintf ((FILE), "\t.p2align %d\n", (int) (LOG));	\
      63  	  else							\
      64  	    fprintf ((FILE), "\t.p2align %d,,%d\n",		\
      65  		     (int) (LOG), (int) (MAX_SKIP));		\
      66  	}							\
      67      } while (0)
      68  
      69  #endif /* HAVE_GAS_MAX_SKIP_P2ALIGN */
      70  
      71  #define JUMP_TABLES_IN_TEXT_SECTION 0
      72  
      73  #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)		\
      74    do {									\
      75      switch (GET_MODE (BODY))						\
      76        {									\
      77        case E_QImode:							\
      78  	asm_fprintf (STREAM, "\t.byte\t(%LL%d - %LLrtx%d) / 4\n",	\
      79  		     VALUE, REL);					\
      80  	break;								\
      81        case E_HImode:							\
      82  	asm_fprintf (STREAM, "\t.2byte\t(%LL%d - %LLrtx%d) / 4\n",	\
      83  		     VALUE, REL);					\
      84  	break;								\
      85        case E_SImode:							\
      86        case E_DImode: /* See comment in aarch64_output_casesi.  */		\
      87  	asm_fprintf (STREAM, "\t.word\t(%LL%d - %LLrtx%d) / 4\n",	\
      88  		     VALUE, REL);					\
      89  	break;								\
      90        default:								\
      91  	gcc_unreachable ();						\
      92        }									\
      93    } while (0)
      94  
      95  #define ASM_OUTPUT_ALIGN(STREAM, POWER)		\
      96    fprintf(STREAM, "\t.align\t%d\n", (int)POWER)
      97  
      98  #define ASM_COMMENT_START "//"
      99  
     100  #define LOCAL_LABEL_PREFIX	"."
     101  #define USER_LABEL_PREFIX	""
     102  
     103  #define GLOBAL_ASM_OP "\t.global\t"
     104  
     105  #ifdef TARGET_BIG_ENDIAN_DEFAULT
     106  #define ENDIAN_SPEC "-mbig-endian"
     107  #else
     108  #define ENDIAN_SPEC "-mlittle-endian"
     109  #endif
     110  
     111  #if TARGET_DATA_MODEL == 1
     112  #define ABI_SPEC  "-mabi=lp64"
     113  #define MULTILIB_DEFAULTS { "mabi=lp64" }
     114  #elif TARGET_DATA_MODEL == 2
     115  #define ABI_SPEC  "-mabi=ilp32"
     116  #define MULTILIB_DEFAULTS { "mabi=ilp32" }
     117  #else
     118  #error "Unknown or undefined TARGET_DATA_MODEL!"
     119  #endif
     120  
     121  /* Force the default endianness and ABI flags onto the command line
     122     in order to make the other specs easier to write.  */
     123  #undef DRIVER_SELF_SPECS
     124  #define DRIVER_SELF_SPECS \
     125    " %{!mbig-endian:%{!mlittle-endian:" ENDIAN_SPEC "}}" \
     126    " %{!mabi=*:" ABI_SPEC "}" \
     127    MCPU_MTUNE_NATIVE_SPECS
     128  
     129  #ifdef HAVE_AS_MABI_OPTION
     130  #define ASM_MABI_SPEC	"%{mabi=*:-mabi=%*}"
     131  #else
     132  #define ASM_MABI_SPEC	"%{mabi=lp64:}"
     133  #endif
     134  
     135  #ifndef ASM_SPEC
     136  #define ASM_SPEC "\
     137  %{mbig-endian:-EB} \
     138  %{mlittle-endian:-EL} \
     139  %{march=*:-march=%*} \
     140  %(asm_cpu_spec)" \
     141  ASM_MABI_SPEC
     142  #endif
     143  
     144  #undef TYPE_OPERAND_FMT
     145  #define TYPE_OPERAND_FMT	"%%%s"
     146  
     147  #endif /* GCC_AARCH64_ELF_H */