1 /* Get CPU type and Features for x86 processors.
2 Copyright (C) 2012-2023 Free Software Foundation, Inc.
3 Contributed by Sriraman Tallam (tmsriram@google.com)
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
10 version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for more details.
16
17 Under Section 7 of GPL version 3, you are granted additional
18 permissions described in the GCC Runtime Library Exception, version
19 3.1, as published by the Free Software Foundation.
20
21 You should have received a copy of the GNU General Public License and
22 a copy of the GCC Runtime Library Exception along with this program;
23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
24 <http://www.gnu.org/licenses/>. */
25
26 /* Processor Vendor and Models. */
27
28 enum processor_vendor
29 {
30 VENDOR_INTEL = 1,
31 VENDOR_AMD,
32 VENDOR_ZHAOXIN,
33 VENDOR_OTHER,
34 VENDOR_CENTAUR,
35 VENDOR_CYRIX,
36 VENDOR_NSC,
37
38 /* Maximum values must be at the end of this enum. */
39 VENDOR_MAX,
40 BUILTIN_VENDOR_MAX = VENDOR_OTHER
41 };
42
43 /* Any new types or subtypes have to be inserted at the end. */
44
45 enum processor_types
46 {
47 INTEL_BONNELL = 1,
48 INTEL_CORE2,
49 INTEL_COREI7,
50 AMDFAM10H,
51 AMDFAM15H,
52 INTEL_SILVERMONT,
53 INTEL_KNL,
54 AMD_BTVER1,
55 AMD_BTVER2,
56 AMDFAM17H,
57 INTEL_KNM,
58 INTEL_GOLDMONT,
59 INTEL_GOLDMONT_PLUS,
60 INTEL_TREMONT,
61 AMDFAM19H,
62 ZHAOXIN_FAM7H,
63 INTEL_SIERRAFOREST,
64 INTEL_GRANDRIDGE,
65 CPU_TYPE_MAX,
66 BUILTIN_CPU_TYPE_MAX = CPU_TYPE_MAX
67 };
68
69 enum processor_subtypes
70 {
71 INTEL_COREI7_NEHALEM = 1,
72 INTEL_COREI7_WESTMERE,
73 INTEL_COREI7_SANDYBRIDGE,
74 AMDFAM10H_BARCELONA,
75 AMDFAM10H_SHANGHAI,
76 AMDFAM10H_ISTANBUL,
77 AMDFAM15H_BDVER1,
78 AMDFAM15H_BDVER2,
79 AMDFAM15H_BDVER3,
80 AMDFAM15H_BDVER4,
81 AMDFAM17H_ZNVER1,
82 INTEL_COREI7_IVYBRIDGE,
83 INTEL_COREI7_HASWELL,
84 INTEL_COREI7_BROADWELL,
85 INTEL_COREI7_SKYLAKE,
86 INTEL_COREI7_SKYLAKE_AVX512,
87 INTEL_COREI7_CANNONLAKE,
88 INTEL_COREI7_ICELAKE_CLIENT,
89 INTEL_COREI7_ICELAKE_SERVER,
90 AMDFAM17H_ZNVER2,
91 INTEL_COREI7_CASCADELAKE,
92 INTEL_COREI7_TIGERLAKE,
93 INTEL_COREI7_COOPERLAKE,
94 INTEL_COREI7_SAPPHIRERAPIDS,
95 INTEL_COREI7_ALDERLAKE,
96 AMDFAM19H_ZNVER3,
97 INTEL_COREI7_ROCKETLAKE,
98 ZHAOXIN_FAM7H_LUJIAZUI,
99 AMDFAM19H_ZNVER4,
100 INTEL_COREI7_GRANITERAPIDS,
101 INTEL_COREI7_GRANITERAPIDS_D,
102 CPU_SUBTYPE_MAX
103 };
104
105 /* Priority of i386 features, greater value is higher priority. This is
106 used to decide the order in which function dispatch must happen. For
107 instance, a version specialized for SSE4.2 should be checked for dispatch
108 before a version for SSE3, as SSE4.2 implies SSE3. */
109 enum feature_priority
110 {
111 P_NONE = 0,
112 P_MMX,
113 P_SSE,
114 P_SSE2,
115 P_X86_64_BASELINE,
116 P_SSE3,
117 P_SSSE3,
118 P_PROC_SSSE3,
119 P_SSE4_A,
120 P_PROC_SSE4_A,
121 P_SSE4_1,
122 P_SSE4_2,
123 P_PROC_SSE4_2,
124 P_POPCNT,
125 P_X86_64_V2,
126 P_AES,
127 P_PCLMUL,
128 P_AVX,
129 P_PROC_AVX,
130 P_BMI,
131 P_PROC_BMI,
132 P_FMA4,
133 P_XOP,
134 P_PROC_XOP,
135 P_FMA,
136 P_PROC_FMA,
137 P_BMI2,
138 P_AVX2,
139 P_PROC_AVX2,
140 P_X86_64_V3,
141 P_AVX512F,
142 P_PROC_AVX512F,
143 P_X86_64_V4,
144 P_PROC_DYNAMIC
145 };
146
147 /* ISA Features supported. New features have to be inserted at the end. */
148
149 enum processor_features
150 {
151 FEATURE_CMOV = 0,
152 FEATURE_MMX,
153 FEATURE_POPCNT,
154 FEATURE_SSE,
155 FEATURE_SSE2,
156 FEATURE_SSE3,
157 FEATURE_SSSE3,
158 FEATURE_SSE4_1,
159 FEATURE_SSE4_2,
160 FEATURE_AVX,
161 FEATURE_AVX2,
162 FEATURE_SSE4_A,
163 FEATURE_FMA4,
164 FEATURE_XOP,
165 FEATURE_FMA,
166 FEATURE_AVX512F,
167 FEATURE_BMI,
168 FEATURE_BMI2,
169 FEATURE_AES,
170 FEATURE_PCLMUL,
171 FEATURE_AVX512VL,
172 FEATURE_AVX512BW,
173 FEATURE_AVX512DQ,
174 FEATURE_AVX512CD,
175 FEATURE_AVX512ER,
176 FEATURE_AVX512PF,
177 FEATURE_AVX512VBMI,
178 FEATURE_AVX512IFMA,
179 FEATURE_AVX5124VNNIW,
180 FEATURE_AVX5124FMAPS,
181 FEATURE_AVX512VPOPCNTDQ,
182 FEATURE_AVX512VBMI2,
183 FEATURE_GFNI,
184 FEATURE_VPCLMULQDQ,
185 FEATURE_AVX512VNNI,
186 FEATURE_AVX512BITALG,
187 FEATURE_AVX512BF16,
188 FEATURE_AVX512VP2INTERSECT,
189 FEATURE_3DNOW,
190 FEATURE_3DNOWP,
191 FEATURE_ADX,
192 FEATURE_ABM,
193 FEATURE_CLDEMOTE,
194 FEATURE_CLFLUSHOPT,
195 FEATURE_CLWB,
196 FEATURE_CLZERO,
197 FEATURE_CMPXCHG16B,
198 FEATURE_CMPXCHG8B,
199 FEATURE_ENQCMD,
200 FEATURE_F16C,
201 FEATURE_FSGSBASE,
202 FEATURE_FXSAVE,
203 FEATURE_HLE,
204 FEATURE_IBT,
205 FEATURE_LAHF_LM,
206 FEATURE_LM,
207 FEATURE_LWP,
208 FEATURE_LZCNT,
209 FEATURE_MOVBE,
210 FEATURE_MOVDIR64B,
211 FEATURE_MOVDIRI,
212 FEATURE_MWAITX,
213 FEATURE_OSXSAVE,
214 FEATURE_PCONFIG,
215 FEATURE_PKU,
216 FEATURE_PREFETCHWT1,
217 FEATURE_PRFCHW,
218 FEATURE_PTWRITE,
219 FEATURE_RDPID,
220 FEATURE_RDRND,
221 FEATURE_RDSEED,
222 FEATURE_RTM,
223 FEATURE_SERIALIZE,
224 FEATURE_SGX,
225 FEATURE_SHA,
226 FEATURE_SHSTK,
227 FEATURE_TBM,
228 FEATURE_TSXLDTRK,
229 FEATURE_VAES,
230 FEATURE_WAITPKG,
231 FEATURE_WBNOINVD,
232 FEATURE_XSAVE,
233 FEATURE_XSAVEC,
234 FEATURE_XSAVEOPT,
235 FEATURE_XSAVES,
236 FEATURE_AMX_TILE,
237 FEATURE_AMX_INT8,
238 FEATURE_AMX_BF16,
239 FEATURE_UINTR,
240 FEATURE_HRESET,
241 FEATURE_KL,
242 FEATURE_AESKLE,
243 FEATURE_WIDEKL,
244 FEATURE_AVXVNNI,
245 FEATURE_AVX512FP16,
246 FEATURE_X86_64_BASELINE,
247 FEATURE_X86_64_V2,
248 FEATURE_X86_64_V3,
249 FEATURE_X86_64_V4,
250 FEATURE_AVXIFMA,
251 FEATURE_AVXVNNIINT8,
252 FEATURE_AVXNECONVERT,
253 FEATURE_CMPCCXADD,
254 FEATURE_AMX_FP16,
255 FEATURE_PREFETCHI,
256 FEATURE_RAOINT,
257 FEATURE_AMX_COMPLEX,
258 CPU_FEATURE_MAX
259 };
260
261 /* Size of __cpu_features2 array in libgcc/config/i386/cpuinfo.c. */
262 #define SIZE_OF_CPU_FEATURES ((CPU_FEATURE_MAX - 1) / 32)
263
264 /* These are the values for vendor types, cpu types and subtypes. Cpu
265 types and subtypes should be subtracted by the corresponding start
266 value. */
267
268 #define M_CPU_TYPE_START (BUILTIN_VENDOR_MAX)
269 #define M_CPU_SUBTYPE_START \
270 (M_CPU_TYPE_START + BUILTIN_CPU_TYPE_MAX)
271 #define M_VENDOR(a) (a)
272 #define M_CPU_TYPE(a) (M_CPU_TYPE_START + a)
273 #define M_CPU_SUBTYPE(a) (M_CPU_SUBTYPE_START + a)