1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* CPU data header for ip2k.
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5
6 Copyright (C) 1996-2023 Free Software Foundation, Inc.
7
8 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9
10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
14
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
19
20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
23
24 */
25
26 #ifndef IP2K_CPU_H
27 #define IP2K_CPU_H
28
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32
33 #define CGEN_ARCH ip2k
34
35 /* Given symbol S, return ip2k_cgen_<S>. */
36 #define CGEN_SYM(s) ip2k##_cgen_##s
37
38
39 /* Selected cpu families. */
40 #define HAVE_CPU_IP2KBF
41
42 #define CGEN_INSN_LSB0_P 1
43
44 /* Minimum size of any insn (in bytes). */
45 #define CGEN_MIN_INSN_SIZE 2
46
47 /* Maximum size of any insn (in bytes). */
48 #define CGEN_MAX_INSN_SIZE 2
49
50 #define CGEN_INT_INSN_P 1
51
52 /* Maximum number of syntax elements in an instruction. */
53 #define CGEN_ACTUAL_MAX_SYNTAX_ELEMENTS 12
54
55 /* CGEN_MNEMONIC_OPERANDS is defined if mnemonics have operands.
56 e.g. In "b,a foo" the ",a" is an operand. If mnemonics have operands
57 we can't hash on everything up to the space. */
58 #define CGEN_MNEMONIC_OPERANDS
59
60 /* Maximum number of fields in an instruction. */
61 #define CGEN_ACTUAL_MAX_IFMT_OPERANDS 3
62
63 /* Enums. */
64
65 /* Enum declaration for op6 enums. */
66 typedef enum insn_op6 {
67 OP6_OTHER1, OP6_OTHER2, OP6_SUB, OP6_DEC
68 , OP6_OR, OP6_AND, OP6_XOR, OP6_ADD
69 , OP6_TEST, OP6_NOT, OP6_INC, OP6_DECSZ
70 , OP6_RR, OP6_RL, OP6_SWAP, OP6_INCSZ
71 , OP6_CSE, OP6_POP, OP6_SUBC, OP6_DECSNZ
72 , OP6_MULU, OP6_MULS, OP6_INCSNZ, OP6_ADDC
73 } INSN_OP6;
74
75 /* Enum declaration for dir enums. */
76 typedef enum insn_dir {
77 DIR_TO_W, DIR_NOTTO_W
78 } INSN_DIR;
79
80 /* Enum declaration for op4 enums. */
81 typedef enum insn_op4 {
82 OP4_LITERAL = 7, OP4_CLRB = 8, OP4_SETB = 9, OP4_SNB = 10
83 , OP4_SB = 11
84 } INSN_OP4;
85
86 /* Enum declaration for op4mid enums. */
87 typedef enum insn_op4mid {
88 OP4MID_LOADH_L = 0, OP4MID_LOADL_L = 1, OP4MID_MULU_L = 2, OP4MID_MULS_L = 3
89 , OP4MID_PUSH_L = 4, OP4MID_CSNE_L = 6, OP4MID_CSE_L = 7, OP4MID_RETW_L = 8
90 , OP4MID_CMP_L = 9, OP4MID_SUB_L = 10, OP4MID_ADD_L = 11, OP4MID_MOV_L = 12
91 , OP4MID_OR_L = 13, OP4MID_AND_L = 14, OP4MID_XOR_L = 15
92 } INSN_OP4MID;
93
94 /* Enum declaration for op3 enums. */
95 typedef enum insn_op3 {
96 OP3_CALL = 6, OP3_JMP = 7
97 } INSN_OP3;
98
99 /* Enum declaration for . */
100 typedef enum register_names {
101 H_REGISTERS_ADDRSEL = 2, H_REGISTERS_ADDRX = 3, H_REGISTERS_IPH = 4, H_REGISTERS_IPL = 5
102 , H_REGISTERS_SPH = 6, H_REGISTERS_SPL = 7, H_REGISTERS_PCH = 8, H_REGISTERS_PCL = 9
103 , H_REGISTERS_WREG = 10, H_REGISTERS_STATUS = 11, H_REGISTERS_DPH = 12, H_REGISTERS_DPL = 13
104 , H_REGISTERS_SPDREG = 14, H_REGISTERS_MULH = 15, H_REGISTERS_ADDRH = 16, H_REGISTERS_ADDRL = 17
105 , H_REGISTERS_DATAH = 18, H_REGISTERS_DATAL = 19, H_REGISTERS_INTVECH = 20, H_REGISTERS_INTVECL = 21
106 , H_REGISTERS_INTSPD = 22, H_REGISTERS_INTF = 23, H_REGISTERS_INTE = 24, H_REGISTERS_INTED = 25
107 , H_REGISTERS_FCFG = 26, H_REGISTERS_TCTRL = 27, H_REGISTERS_XCFG = 28, H_REGISTERS_EMCFG = 29
108 , H_REGISTERS_IPCH = 30, H_REGISTERS_IPCL = 31, H_REGISTERS_RAIN = 32, H_REGISTERS_RAOUT = 33
109 , H_REGISTERS_RADIR = 34, H_REGISTERS_LFSRH = 35, H_REGISTERS_RBIN = 36, H_REGISTERS_RBOUT = 37
110 , H_REGISTERS_RBDIR = 38, H_REGISTERS_LFSRL = 39, H_REGISTERS_RCIN = 40, H_REGISTERS_RCOUT = 41
111 , H_REGISTERS_RCDIR = 42, H_REGISTERS_LFSRA = 43, H_REGISTERS_RDIN = 44, H_REGISTERS_RDOUT = 45
112 , H_REGISTERS_RDDIR = 46, H_REGISTERS_REIN = 48, H_REGISTERS_REOUT = 49, H_REGISTERS_REDIR = 50
113 , H_REGISTERS_RFIN = 52, H_REGISTERS_RFOUT = 53, H_REGISTERS_RFDIR = 54, H_REGISTERS_RGOUT = 57
114 , H_REGISTERS_RGDIR = 58, H_REGISTERS_RTTMR = 64, H_REGISTERS_RTCFG = 65, H_REGISTERS_T0TMR = 66
115 , H_REGISTERS_T0CFG = 67, H_REGISTERS_T1CNTH = 68, H_REGISTERS_T1CNTL = 69, H_REGISTERS_T1CAP1H = 70
116 , H_REGISTERS_T1CAP1L = 71, H_REGISTERS_T1CAP2H = 72, H_REGISTERS_T1CMP2H = 72, H_REGISTERS_T1CAP2L = 73
117 , H_REGISTERS_T1CMP2L = 73, H_REGISTERS_T1CMP1H = 74, H_REGISTERS_T1CMP1L = 75, H_REGISTERS_T1CFG1H = 76
118 , H_REGISTERS_T1CFG1L = 77, H_REGISTERS_T1CFG2H = 78, H_REGISTERS_T1CFG2L = 79, H_REGISTERS_ADCH = 80
119 , H_REGISTERS_ADCL = 81, H_REGISTERS_ADCCFG = 82, H_REGISTERS_ADCTMR = 83, H_REGISTERS_T2CNTH = 84
120 , H_REGISTERS_T2CNTL = 85, H_REGISTERS_T2CAP1H = 86, H_REGISTERS_T2CAP1L = 87, H_REGISTERS_T2CAP2H = 88
121 , H_REGISTERS_T2CMP2H = 88, H_REGISTERS_T2CAP2L = 89, H_REGISTERS_T2CMP2L = 89, H_REGISTERS_T2CMP1H = 90
122 , H_REGISTERS_T2CMP1L = 91, H_REGISTERS_T2CFG1H = 92, H_REGISTERS_T2CFG1L = 93, H_REGISTERS_T2CFG2H = 94
123 , H_REGISTERS_T2CFG2L = 95, H_REGISTERS_S1TMRH = 96, H_REGISTERS_S1TMRL = 97, H_REGISTERS_S1TBUFH = 98
124 , H_REGISTERS_S1TBUFL = 99, H_REGISTERS_S1TCFG = 100, H_REGISTERS_S1RCNT = 101, H_REGISTERS_S1RBUFH = 102
125 , H_REGISTERS_S1RBUFL = 103, H_REGISTERS_S1RCFG = 104, H_REGISTERS_S1RSYNC = 105, H_REGISTERS_S1INTF = 106
126 , H_REGISTERS_S1INTE = 107, H_REGISTERS_S1MODE = 108, H_REGISTERS_S1SMASK = 109, H_REGISTERS_PSPCFG = 110
127 , H_REGISTERS_CMPCFG = 111, H_REGISTERS_S2TMRH = 112, H_REGISTERS_S2TMRL = 113, H_REGISTERS_S2TBUFH = 114
128 , H_REGISTERS_S2TBUFL = 115, H_REGISTERS_S2TCFG = 116, H_REGISTERS_S2RCNT = 117, H_REGISTERS_S2RBUFH = 118
129 , H_REGISTERS_S2RBUFL = 119, H_REGISTERS_S2RCFG = 120, H_REGISTERS_S2RSYNC = 121, H_REGISTERS_S2INTF = 122
130 , H_REGISTERS_S2INTE = 123, H_REGISTERS_S2MODE = 124, H_REGISTERS_S2SMASK = 125, H_REGISTERS_CALLH = 126
131 , H_REGISTERS_CALLL = 127
132 } REGISTER_NAMES;
133
134 /* Attributes. */
135
136 /* Enum declaration for machine type selection. */
137 typedef enum mach_attr {
138 MACH_BASE, MACH_IP2022, MACH_IP2022EXT, MACH_MAX
139 } MACH_ATTR;
140
141 /* Enum declaration for instruction set selection. */
142 typedef enum isa_attr {
143 ISA_IP2K, ISA_MAX
144 } ISA_ATTR;
145
146 /* Number of architecture variants. */
147 #define MAX_ISAS 1
148 #define MAX_MACHS ((int) MACH_MAX)
149
150 /* Ifield support. */
151
152 /* Ifield attribute indices. */
153
154 /* Enum declaration for cgen_ifld attrs. */
155 typedef enum cgen_ifld_attr {
156 CGEN_IFLD_VIRTUAL, CGEN_IFLD_PCREL_ADDR, CGEN_IFLD_ABS_ADDR, CGEN_IFLD_RESERVED
157 , CGEN_IFLD_SIGN_OPT, CGEN_IFLD_SIGNED, CGEN_IFLD_END_BOOLS, CGEN_IFLD_START_NBOOLS = 31
158 , CGEN_IFLD_MACH, CGEN_IFLD_END_NBOOLS
159 } CGEN_IFLD_ATTR;
160
161 /* Number of non-boolean elements in cgen_ifld_attr. */
162 #define CGEN_IFLD_NBOOL_ATTRS (CGEN_IFLD_END_NBOOLS - CGEN_IFLD_START_NBOOLS - 1)
163
164 /* cgen_ifld attribute accessor macros. */
165 #define CGEN_ATTR_CGEN_IFLD_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_IFLD_MACH-CGEN_IFLD_START_NBOOLS-1].nonbitset)
166 #define CGEN_ATTR_CGEN_IFLD_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_VIRTUAL)) != 0)
167 #define CGEN_ATTR_CGEN_IFLD_PCREL_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_PCREL_ADDR)) != 0)
168 #define CGEN_ATTR_CGEN_IFLD_ABS_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_ABS_ADDR)) != 0)
169 #define CGEN_ATTR_CGEN_IFLD_RESERVED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_RESERVED)) != 0)
170 #define CGEN_ATTR_CGEN_IFLD_SIGN_OPT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_SIGN_OPT)) != 0)
171 #define CGEN_ATTR_CGEN_IFLD_SIGNED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_IFLD_SIGNED)) != 0)
172
173 /* Enum declaration for ip2k ifield types. */
174 typedef enum ifield_type {
175 IP2K_F_NIL, IP2K_F_ANYOF, IP2K_F_IMM8, IP2K_F_REG
176 , IP2K_F_ADDR16CJP, IP2K_F_DIR, IP2K_F_BITNO, IP2K_F_OP3
177 , IP2K_F_OP4, IP2K_F_OP4MID, IP2K_F_OP6, IP2K_F_OP8
178 , IP2K_F_OP6_10LOW, IP2K_F_OP6_7LOW, IP2K_F_RETI3, IP2K_F_SKIPB
179 , IP2K_F_PAGE3, IP2K_F_MAX
180 } IFIELD_TYPE;
181
182 #define MAX_IFLD ((int) IP2K_F_MAX)
183
184 /* Hardware attribute indices. */
185
186 /* Enum declaration for cgen_hw attrs. */
187 typedef enum cgen_hw_attr {
188 CGEN_HW_VIRTUAL, CGEN_HW_CACHE_ADDR, CGEN_HW_PC, CGEN_HW_PROFILE
189 , CGEN_HW_END_BOOLS, CGEN_HW_START_NBOOLS = 31, CGEN_HW_MACH, CGEN_HW_END_NBOOLS
190 } CGEN_HW_ATTR;
191
192 /* Number of non-boolean elements in cgen_hw_attr. */
193 #define CGEN_HW_NBOOL_ATTRS (CGEN_HW_END_NBOOLS - CGEN_HW_START_NBOOLS - 1)
194
195 /* cgen_hw attribute accessor macros. */
196 #define CGEN_ATTR_CGEN_HW_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_HW_MACH-CGEN_HW_START_NBOOLS-1].nonbitset)
197 #define CGEN_ATTR_CGEN_HW_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_VIRTUAL)) != 0)
198 #define CGEN_ATTR_CGEN_HW_CACHE_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_CACHE_ADDR)) != 0)
199 #define CGEN_ATTR_CGEN_HW_PC_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_PC)) != 0)
200 #define CGEN_ATTR_CGEN_HW_PROFILE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_HW_PROFILE)) != 0)
201
202 /* Enum declaration for ip2k hardware types. */
203 typedef enum cgen_hw_type {
204 HW_H_MEMORY, HW_H_SINT, HW_H_UINT, HW_H_ADDR
205 , HW_H_IADDR, HW_H_SPR, HW_H_REGISTERS, HW_H_STACK
206 , HW_H_PABITS, HW_H_ZBIT, HW_H_CBIT, HW_H_DCBIT
207 , HW_H_PC, HW_MAX
208 } CGEN_HW_TYPE;
209
210 #define MAX_HW ((int) HW_MAX)
211
212 /* Operand attribute indices. */
213
214 /* Enum declaration for cgen_operand attrs. */
215 typedef enum cgen_operand_attr {
216 CGEN_OPERAND_VIRTUAL, CGEN_OPERAND_PCREL_ADDR, CGEN_OPERAND_ABS_ADDR, CGEN_OPERAND_SIGN_OPT
217 , CGEN_OPERAND_SIGNED, CGEN_OPERAND_NEGATIVE, CGEN_OPERAND_RELAX, CGEN_OPERAND_SEM_ONLY
218 , CGEN_OPERAND_END_BOOLS, CGEN_OPERAND_START_NBOOLS = 31, CGEN_OPERAND_MACH, CGEN_OPERAND_END_NBOOLS
219 } CGEN_OPERAND_ATTR;
220
221 /* Number of non-boolean elements in cgen_operand_attr. */
222 #define CGEN_OPERAND_NBOOL_ATTRS (CGEN_OPERAND_END_NBOOLS - CGEN_OPERAND_START_NBOOLS - 1)
223
224 /* cgen_operand attribute accessor macros. */
225 #define CGEN_ATTR_CGEN_OPERAND_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_OPERAND_MACH-CGEN_OPERAND_START_NBOOLS-1].nonbitset)
226 #define CGEN_ATTR_CGEN_OPERAND_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_VIRTUAL)) != 0)
227 #define CGEN_ATTR_CGEN_OPERAND_PCREL_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_PCREL_ADDR)) != 0)
228 #define CGEN_ATTR_CGEN_OPERAND_ABS_ADDR_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_ABS_ADDR)) != 0)
229 #define CGEN_ATTR_CGEN_OPERAND_SIGN_OPT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SIGN_OPT)) != 0)
230 #define CGEN_ATTR_CGEN_OPERAND_SIGNED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SIGNED)) != 0)
231 #define CGEN_ATTR_CGEN_OPERAND_NEGATIVE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_NEGATIVE)) != 0)
232 #define CGEN_ATTR_CGEN_OPERAND_RELAX_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_RELAX)) != 0)
233 #define CGEN_ATTR_CGEN_OPERAND_SEM_ONLY_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_OPERAND_SEM_ONLY)) != 0)
234
235 /* Enum declaration for ip2k operand types. */
236 typedef enum cgen_operand_type {
237 IP2K_OPERAND_PC, IP2K_OPERAND_ADDR16CJP, IP2K_OPERAND_FR, IP2K_OPERAND_LIT8
238 , IP2K_OPERAND_BITNO, IP2K_OPERAND_ADDR16P, IP2K_OPERAND_ADDR16H, IP2K_OPERAND_ADDR16L
239 , IP2K_OPERAND_RETI3, IP2K_OPERAND_PABITS, IP2K_OPERAND_ZBIT, IP2K_OPERAND_CBIT
240 , IP2K_OPERAND_DCBIT, IP2K_OPERAND_MAX
241 } CGEN_OPERAND_TYPE;
242
243 /* Number of operands types. */
244 #define MAX_OPERANDS 13
245
246 /* Maximum number of operands referenced by any insn. */
247 #define MAX_OPERAND_INSTANCES 8
248
249 /* Insn attribute indices. */
250
251 /* Enum declaration for cgen_insn attrs. */
252 typedef enum cgen_insn_attr {
253 CGEN_INSN_ALIAS, CGEN_INSN_VIRTUAL, CGEN_INSN_UNCOND_CTI, CGEN_INSN_COND_CTI
254 , CGEN_INSN_SKIP_CTI, CGEN_INSN_DELAY_SLOT, CGEN_INSN_RELAXABLE, CGEN_INSN_RELAXED
255 , CGEN_INSN_NO_DIS, CGEN_INSN_PBB, CGEN_INSN_EXT_SKIP_INSN, CGEN_INSN_SKIPA
256 , CGEN_INSN_END_BOOLS, CGEN_INSN_START_NBOOLS = 31, CGEN_INSN_MACH, CGEN_INSN_END_NBOOLS
257 } CGEN_INSN_ATTR;
258
259 /* Number of non-boolean elements in cgen_insn_attr. */
260 #define CGEN_INSN_NBOOL_ATTRS (CGEN_INSN_END_NBOOLS - CGEN_INSN_START_NBOOLS - 1)
261
262 /* cgen_insn attribute accessor macros. */
263 #define CGEN_ATTR_CGEN_INSN_MACH_VALUE(attrs) ((attrs)->nonbool[CGEN_INSN_MACH-CGEN_INSN_START_NBOOLS-1].nonbitset)
264 #define CGEN_ATTR_CGEN_INSN_ALIAS_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_ALIAS)) != 0)
265 #define CGEN_ATTR_CGEN_INSN_VIRTUAL_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_VIRTUAL)) != 0)
266 #define CGEN_ATTR_CGEN_INSN_UNCOND_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_UNCOND_CTI)) != 0)
267 #define CGEN_ATTR_CGEN_INSN_COND_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_COND_CTI)) != 0)
268 #define CGEN_ATTR_CGEN_INSN_SKIP_CTI_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_SKIP_CTI)) != 0)
269 #define CGEN_ATTR_CGEN_INSN_DELAY_SLOT_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_DELAY_SLOT)) != 0)
270 #define CGEN_ATTR_CGEN_INSN_RELAXABLE_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_RELAXABLE)) != 0)
271 #define CGEN_ATTR_CGEN_INSN_RELAXED_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_RELAXED)) != 0)
272 #define CGEN_ATTR_CGEN_INSN_NO_DIS_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_NO_DIS)) != 0)
273 #define CGEN_ATTR_CGEN_INSN_PBB_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_PBB)) != 0)
274 #define CGEN_ATTR_CGEN_INSN_EXT_SKIP_INSN_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_EXT_SKIP_INSN)) != 0)
275 #define CGEN_ATTR_CGEN_INSN_SKIPA_VALUE(attrs) (((attrs)->bool_ & (1 << CGEN_INSN_SKIPA)) != 0)
276
277 /* cgen.h uses things we just defined. */
278 #include "opcode/cgen.h"
279
280 extern const struct cgen_ifld ip2k_cgen_ifld_table[];
281
282 /* Attributes. */
283 extern const CGEN_ATTR_TABLE ip2k_cgen_hardware_attr_table[];
284 extern const CGEN_ATTR_TABLE ip2k_cgen_ifield_attr_table[];
285 extern const CGEN_ATTR_TABLE ip2k_cgen_operand_attr_table[];
286 extern const CGEN_ATTR_TABLE ip2k_cgen_insn_attr_table[];
287
288 /* Hardware decls. */
289
290
291 extern const CGEN_HW_ENTRY ip2k_cgen_hw_table[];
292
293
294
295 #ifdef __cplusplus
296 }
297 #endif
298
299 #endif /* IP2K_CPU_H */