(root)/
binutils-2.41/
opcodes/
ia64-asmtab.h
       1  /* ia64-asmtab.h -- Header for compacted IA-64 opcode tables.
       2     Copyright (C) 1999-2023 Free Software Foundation, Inc.
       3     Contributed by Bob Manson of Cygnus Support <manson@cygnus.com>
       4  
       5     This file is part of the GNU opcodes library.
       6  
       7     This library is free software; you can redistribute it and/or modify
       8     it under the terms of the GNU General Public License as published by
       9     the Free Software Foundation; either version 3, or (at your option)
      10     any later version.
      11  
      12     It is distributed in the hope that it will be useful, but WITHOUT
      13     ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
      14     or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
      15     License for more details.
      16  
      17     You should have received a copy of the GNU General Public License
      18     along with this file; see the file COPYING.  If not, write to the
      19     Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
      20     MA 02110-1301, USA.  */
      21  
      22  #ifndef IA64_ASMTAB_H
      23  #define IA64_ASMTAB_H
      24  
      25  #include "opcode/ia64.h"
      26  
      27  /* The primary opcode table is made up of the following: */
      28  struct ia64_main_table
      29  {
      30    /* The entry in the string table that corresponds to the name of this
      31       opcode. */
      32    unsigned short name_index;
      33  
      34    /* The type of opcode; corresponds to the TYPE field in
      35       struct ia64_opcode. */
      36    unsigned char opcode_type;
      37  
      38    /* The number of outputs for this opcode. */
      39    unsigned char num_outputs;
      40  
      41    /* The base insn value for this opcode.  It may be modified by completers. */
      42    ia64_insn opcode;
      43  
      44    /* The mask of valid bits in OPCODE. Zeros indicate operand fields. */
      45    ia64_insn mask;
      46  
      47    /* The operands of this instruction.  Corresponds to the OPERANDS field
      48       in struct ia64_opcode. */
      49    unsigned char operands[5];
      50  
      51    /* The flags for this instruction.  Corresponds to the FLAGS field in
      52       struct ia64_opcode. */
      53    short flags;
      54  
      55    /* The tree of completers for this instruction; this is an offset into
      56       completer_table. */
      57    short completers;
      58  };
      59  
      60  /* Each instruction has a set of possible "completers", or additional
      61     suffixes that can alter the instruction's behavior, and which has
      62     potentially different dependencies.
      63  
      64     The completer entries modify certain bits in the instruction opcode.
      65     Which bits are to be modified are marked by the BITS, MASK and
      66     OFFSET fields.  The completer entry may also note dependencies for the
      67     opcode.
      68  
      69     These completers are arranged in a DAG; the pointers are indexes
      70     into the completer_table array.  The completer DAG is searched by
      71     find_completer () and ia64_find_matching_opcode ().
      72  
      73     Note that each completer needs to be applied in turn, so that if we
      74     have the instruction
      75     	cmp.lt.unc
      76     the completer entries for both "lt" and "unc" would need to be applied
      77     to the opcode's value.
      78  
      79     Some instructions do not require any completers; these contain an
      80     empty completer entry.  Instructions that require a completer do
      81     not contain an empty entry.
      82  
      83     Terminal completers (those completers that validly complete an
      84     instruction) are marked by having the TERMINAL_COMPLETER flag set.
      85  
      86     Only dependencies listed in the terminal completer for an opcode are
      87     considered to apply to that opcode instance. */
      88  
      89  struct ia64_completer_table
      90  {
      91    /* The bit value that this completer sets. */
      92    unsigned int bits;
      93  
      94    /* And its mask. 1s are bits that are to be modified in the
      95       instruction. */
      96    unsigned int mask;
      97  
      98    /* The entry in the string table that corresponds to the name of this
      99       completer. */
     100    unsigned short name_index;
     101  
     102    /* An alternative completer, or -1 if this is the end of the chain. */
     103    short alternative;
     104  
     105    /* A pointer to the DAG of completers that can potentially follow
     106       this one, or -1. */
     107    short subentries;
     108  
     109    /* The bit offset in the instruction where BITS and MASK should be
     110       applied. */
     111    unsigned char offset : 7;
     112  
     113    unsigned char terminal_completer : 1;
     114  
     115    /* Index into the dependency list table */
     116    short dependencies;
     117  };
     118  
     119  /* This contains sufficient information for the disassembler to resolve
     120     the complete name of the original instruction.  */
     121  struct ia64_dis_names
     122  {
     123    /* COMPLETER_INDEX represents the tree of completers that make up
     124       the instruction.  The LSB represents the top of the tree for the
     125       specified instruction.
     126  
     127       A 0 bit indicates to go to the next alternate completer via the
     128       alternative field; a 1 bit indicates that the current completer
     129       is part of the instruction, and to go down the subentries index.
     130       We know we've reached the final completer when we run out of 1
     131       bits.
     132  
     133       There is always at least one 1 bit. */
     134    unsigned int completer_index ;
     135  
     136    /* The index in the main_table[] array for the instruction. */
     137    unsigned short insn_index : 11;
     138  
     139    /* If set, the next entry in this table is an alternate possibility
     140       for this instruction encoding.  Which one to use is determined by
     141       the instruction type and other factors (see opcode_verify ()).  */
     142    unsigned int next_flag : 1;
     143  
     144    /* The disassembly priority of this entry among instructions. */
     145    unsigned short priority;
     146  };
     147  
     148  #endif