1 /* PREFIX_EVEX_0F5B */
2 {
3 { VEX_W_TABLE (EVEX_W_0F5B_P_0) },
4 { "%XEvcvttp%XS2dq", { XM, EXx, EXxEVexS }, 0 },
5 { "%XEvcvtp%XS2dq", { XM, EXx, EXxEVexR }, 0 },
6 },
7 /* PREFIX_EVEX_0F6F */
8 {
9 { Bad_Opcode },
10 { VEX_W_TABLE (EVEX_W_0F6F_P_1) },
11 { VEX_W_TABLE (EVEX_W_0F6F_P_2) },
12 { VEX_W_TABLE (EVEX_W_0F6F_P_3) },
13 },
14 /* PREFIX_EVEX_0F70 */
15 {
16 { Bad_Opcode },
17 { "%XEvpshufhw", { XM, EXx, Ib }, 0 },
18 { VEX_W_TABLE (EVEX_W_0F70_P_2) },
19 { "%XEvpshuflw", { XM, EXx, Ib }, 0 },
20 },
21 /* PREFIX_EVEX_0F78 */
22 {
23 { VEX_W_TABLE (EVEX_W_0F78_P_0) },
24 { "vcvttss2usi", { Gdq, EXd, EXxEVexS }, 0 },
25 { VEX_W_TABLE (EVEX_W_0F78_P_2) },
26 { "vcvttsd2usi", { Gdq, EXq, EXxEVexS }, 0 },
27 },
28 /* PREFIX_EVEX_0F79 */
29 {
30 { VEX_W_TABLE (EVEX_W_0F79_P_0) },
31 { "vcvtss2usi", { Gdq, EXd, EXxEVexR }, 0 },
32 { VEX_W_TABLE (EVEX_W_0F79_P_2) },
33 { "vcvtsd2usi", { Gdq, EXq, EXxEVexR }, 0 },
34 },
35 /* PREFIX_EVEX_0F7A */
36 {
37 { Bad_Opcode },
38 { VEX_W_TABLE (EVEX_W_0F7A_P_1) },
39 { VEX_W_TABLE (EVEX_W_0F7A_P_2) },
40 { VEX_W_TABLE (EVEX_W_0F7A_P_3) },
41 },
42 /* PREFIX_EVEX_0F7B */
43 {
44 { Bad_Opcode },
45 { "vcvtusi2ss{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
46 { VEX_W_TABLE (EVEX_W_0F7B_P_2) },
47 { "vcvtusi2sd{%LQ|}", { XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
48 },
49 /* PREFIX_EVEX_0F7E */
50 {
51 { Bad_Opcode },
52 { VEX_W_TABLE (EVEX_W_0F7E_P_1) },
53 { VEX_LEN_TABLE (VEX_LEN_0F7E_P_2) },
54 },
55 /* PREFIX_EVEX_0F7F */
56 {
57 { Bad_Opcode },
58 { VEX_W_TABLE (EVEX_W_0F7F_P_1) },
59 { VEX_W_TABLE (EVEX_W_0F7F_P_2) },
60 { VEX_W_TABLE (EVEX_W_0F7F_P_3) },
61 },
62 /* PREFIX_EVEX_0FC2 */
63 {
64 { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
65 { "vcmps%XS", { MaskG, VexScalar, EXd, EXxEVexS, CMP }, 0 },
66 { "vcmppX", { MaskG, Vex, EXx, EXxEVexS, CMP }, PREFIX_OPCODE },
67 { "vcmps%XD", { MaskG, VexScalar, EXq, EXxEVexS, CMP }, 0 },
68 },
69 /* PREFIX_EVEX_0FE6 */
70 {
71 { Bad_Opcode },
72 { VEX_W_TABLE (EVEX_W_0FE6_P_1) },
73 { "%XEvcvttp%XD2dq%XY", { XMxmmq, EXx, EXxEVexS }, 0 },
74 { "%XEvcvtp%XD2dq%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
75 },
76 /* PREFIX_EVEX_0F3810 */
77 {
78 { Bad_Opcode },
79 { VEX_W_TABLE (EVEX_W_0F3810_P_1) },
80 { VEX_W_TABLE (EVEX_W_0F3810_P_2) },
81 },
82 /* PREFIX_EVEX_0F3811 */
83 {
84 { Bad_Opcode },
85 { VEX_W_TABLE (EVEX_W_0F3811_P_1) },
86 { VEX_W_TABLE (EVEX_W_0F3811_P_2) },
87 },
88 /* PREFIX_EVEX_0F3812 */
89 {
90 { Bad_Opcode },
91 { VEX_W_TABLE (EVEX_W_0F3812_P_1) },
92 { VEX_W_TABLE (EVEX_W_0F3812_P_2) },
93 },
94 /* PREFIX_EVEX_0F3813 */
95 {
96 { Bad_Opcode },
97 { VEX_W_TABLE (EVEX_W_0F3813_P_1) },
98 { "%XEvcvtph2p%XS", { XM, EXxmmq, EXxEVexS }, 0 },
99 },
100 /* PREFIX_EVEX_0F3814 */
101 {
102 { Bad_Opcode },
103 { VEX_W_TABLE (EVEX_W_0F3814_P_1) },
104 { "vprorv%DQ", { XM, Vex, EXx }, 0 },
105 },
106 /* PREFIX_EVEX_0F3815 */
107 {
108 { Bad_Opcode },
109 { VEX_W_TABLE (EVEX_W_0F3815_P_1) },
110 { "vprolv%DQ", { XM, Vex, EXx }, 0 },
111 },
112 /* PREFIX_EVEX_0F3820 */
113 {
114 { Bad_Opcode },
115 { VEX_W_TABLE (EVEX_W_0F3820_P_1) },
116 { "%XEvpmovsxbw", { XM, EXxmmq }, 0 },
117 },
118 /* PREFIX_EVEX_0F3821 */
119 {
120 { Bad_Opcode },
121 { VEX_W_TABLE (EVEX_W_0F3821_P_1) },
122 { "%XEvpmovsxbd", { XM, EXxmmqd }, 0 },
123 },
124 /* PREFIX_EVEX_0F3822 */
125 {
126 { Bad_Opcode },
127 { VEX_W_TABLE (EVEX_W_0F3822_P_1) },
128 { "%XEvpmovsxbq", { XM, EXxmmdw }, 0 },
129 },
130 /* PREFIX_EVEX_0F3823 */
131 {
132 { Bad_Opcode },
133 { VEX_W_TABLE (EVEX_W_0F3823_P_1) },
134 { "%XEvpmovsxwd", { XM, EXxmmq }, 0 },
135 },
136 /* PREFIX_EVEX_0F3824 */
137 {
138 { Bad_Opcode },
139 { VEX_W_TABLE (EVEX_W_0F3824_P_1) },
140 { "%XEvpmovsxwq", { XM, EXxmmqd }, 0 },
141 },
142 /* PREFIX_EVEX_0F3825 */
143 {
144 { Bad_Opcode },
145 { VEX_W_TABLE (EVEX_W_0F3825_P_1) },
146 { VEX_W_TABLE (EVEX_W_0F3825_P_2) },
147 },
148 /* PREFIX_EVEX_0F3826 */
149 {
150 { Bad_Opcode },
151 { "vptestnm%BW", { MaskG, Vex, EXx }, 0 },
152 { "vptestm%BW", { MaskG, Vex, EXx }, 0 },
153 },
154 /* PREFIX_EVEX_0F3827 */
155 {
156 { Bad_Opcode },
157 { "vptestnm%DQ", { MaskG, Vex, EXx }, 0 },
158 { "vptestm%DQ", { MaskG, Vex, EXx }, 0 },
159 },
160 /* PREFIX_EVEX_0F3828 */
161 {
162 { Bad_Opcode },
163 { MOD_TABLE (MOD_EVEX_0F3828_P_1) },
164 { VEX_W_TABLE (EVEX_W_0F3828_P_2) },
165 },
166 /* PREFIX_EVEX_0F3829 */
167 {
168 { Bad_Opcode },
169 { "vpmov%BW2m", { MaskG, EXx }, 0 },
170 { VEX_W_TABLE (EVEX_W_0F3829_P_2) },
171 },
172 /* PREFIX_EVEX_0F382A */
173 {
174 { Bad_Opcode },
175 { VEX_W_TABLE (EVEX_W_0F382A_P_1) },
176 { VEX_W_TABLE (EVEX_W_0F382A_P_2) },
177 },
178 /* PREFIX_EVEX_0F3830 */
179 {
180 { Bad_Opcode },
181 { VEX_W_TABLE (EVEX_W_0F3830_P_1) },
182 { "%XEvpmovzxbw", { XM, EXxmmq }, 0 },
183 },
184 /* PREFIX_EVEX_0F3831 */
185 {
186 { Bad_Opcode },
187 { VEX_W_TABLE (EVEX_W_0F3831_P_1) },
188 { "%XEvpmovzxbd", { XM, EXxmmqd }, 0 },
189 },
190 /* PREFIX_EVEX_0F3832 */
191 {
192 { Bad_Opcode },
193 { VEX_W_TABLE (EVEX_W_0F3832_P_1) },
194 { "%XEvpmovzxbq", { XM, EXxmmdw }, 0 },
195 },
196 /* PREFIX_EVEX_0F3833 */
197 {
198 { Bad_Opcode },
199 { VEX_W_TABLE (EVEX_W_0F3833_P_1) },
200 { "%XEvpmovzxwd", { XM, EXxmmq }, 0 },
201 },
202 /* PREFIX_EVEX_0F3834 */
203 {
204 { Bad_Opcode },
205 { VEX_W_TABLE (EVEX_W_0F3834_P_1) },
206 { "%XEvpmovzxwq", { XM, EXxmmqd }, 0 },
207 },
208 /* PREFIX_EVEX_0F3835 */
209 {
210 { Bad_Opcode },
211 { VEX_W_TABLE (EVEX_W_0F3835_P_1) },
212 { VEX_W_TABLE (EVEX_W_0F3835_P_2) },
213 },
214 /* PREFIX_EVEX_0F3838 */
215 {
216 { Bad_Opcode },
217 { MOD_TABLE (MOD_EVEX_0F3838_P_1) },
218 { "%XEvpminsb", { XM, Vex, EXx }, 0 },
219 },
220 /* PREFIX_EVEX_0F3839 */
221 {
222 { Bad_Opcode },
223 { "vpmov%DQ2m", { MaskG, EXx }, 0 },
224 { "%XEvpmins%DQ", { XM, Vex, EXx }, 0 },
225 },
226 /* PREFIX_EVEX_0F383A */
227 {
228 { Bad_Opcode },
229 { VEX_W_TABLE (EVEX_W_0F383A_P_1) },
230 { "%XEvpminuw", { XM, Vex, EXx }, 0 },
231 },
232 /* PREFIX_EVEX_0F3852 */
233 {
234 { Bad_Opcode },
235 { "vdpbf16p%XS", { XM, Vex, EXx }, 0 },
236 { VEX_W_TABLE (VEX_W_0F3852) },
237 { "vp4dpws%XSd", { XM, Vex, Mxmm }, 0 },
238 },
239 /* PREFIX_EVEX_0F3853 */
240 {
241 { Bad_Opcode },
242 { Bad_Opcode },
243 { VEX_W_TABLE (VEX_W_0F3853) },
244 { "vp4dpws%XSds", { XM, Vex, Mxmm }, 0 },
245 },
246 /* PREFIX_EVEX_0F3868 */
247 {
248 { Bad_Opcode },
249 { Bad_Opcode },
250 { Bad_Opcode },
251 { "vp2intersect%DQ", { MaskG, Vex, EXx, EXxEVexS }, 0 },
252 },
253 /* PREFIX_EVEX_0F3872 */
254 {
255 { Bad_Opcode },
256 { "vcvtnep%XS2bf16%XY", { XMxmmq, EXx }, 0 },
257 { VEX_W_TABLE (EVEX_W_0F3872_P_2) },
258 { "vcvtne2p%XS2bf16", { XM, Vex, EXx}, 0 },
259 },
260 /* PREFIX_EVEX_0F389A */
261 {
262 { Bad_Opcode },
263 { Bad_Opcode },
264 { "%XEvfmsub132p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
265 { "v4fmaddp%XS", { XM, Vex, Mxmm }, 0 },
266 },
267 /* PREFIX_EVEX_0F389B */
268 {
269 { Bad_Opcode },
270 { Bad_Opcode },
271 { "%XEvfmsub132s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
272 { "v4fmadds%XS", { XMScalar, VexScalar, Mxmm }, 0 },
273 },
274 /* PREFIX_EVEX_0F38AA */
275 {
276 { Bad_Opcode },
277 { Bad_Opcode },
278 { "%XEvfmsub213p%XW", { XM, Vex, EXx, EXxEVexR }, 0 },
279 { "v4fnmaddp%XS", { XM, Vex, Mxmm }, 0 },
280 },
281 /* PREFIX_EVEX_0F38AB */
282 {
283 { Bad_Opcode },
284 { Bad_Opcode },
285 { "%XEvfmsub213s%XW", { XMScalar, VexScalar, EXdq, EXxEVexR }, 0 },
286 { "v4fnmadds%XS", { XMScalar, VexScalar, Mxmm }, 0 },
287 },
288 /* PREFIX_EVEX_0F3A08 */
289 {
290 { "vrndscalep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 },
291 { Bad_Opcode },
292 { "vrndscalep%XS", { XM, EXx, EXxEVexS, Ib }, 0 },
293 },
294 /* PREFIX_EVEX_0F3A0A */
295 {
296 { "vrndscales%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
297 { Bad_Opcode },
298 { "vrndscales%XS", { XMScalar, VexScalar, EXd, EXxEVexS, Ib }, 0 },
299 },
300 /* PREFIX_EVEX_0F3A26 */
301 {
302 { "vgetmantp%XH", { XM, EXxh, EXxEVexS, Ib }, 0 },
303 { Bad_Opcode },
304 { "vgetmantp%XW", { XM, EXx, EXxEVexS, Ib }, 0 },
305 },
306 /* PREFIX_EVEX_0F3A27 */
307 {
308 { "vgetmants%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
309 { Bad_Opcode },
310 { "vgetmants%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
311 },
312 /* PREFIX_EVEX_0F3A56 */
313 {
314 { "vreducep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 },
315 { Bad_Opcode },
316 { "vreducep%XW", { XM, EXx, EXxEVexS, Ib }, 0 },
317 },
318 /* PREFIX_EVEX_0F3A57 */
319 {
320 { "vreduces%XH", { XMScalar, VexScalar, EXw, EXxEVexS, Ib }, 0 },
321 { Bad_Opcode },
322 { "vreduces%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
323 },
324 /* PREFIX_EVEX_0F3A66 */
325 {
326 { "vfpclassp%XH%XZ", { MaskG, EXxh, Ib }, 0 },
327 { Bad_Opcode },
328 { "vfpclassp%XW%XZ", { MaskG, EXx, Ib }, 0 },
329 },
330 /* PREFIX_EVEX_0F3A67 */
331 {
332 { "vfpclasss%XH", { MaskG, EXw, Ib }, 0 },
333 { Bad_Opcode },
334 { "vfpclasss%XW", { MaskG, EXdq, Ib }, 0 },
335 },
336 /* PREFIX_EVEX_0F3AC2 */
337 {
338 { "vcmpp%XH", { MaskG, Vex, EXxh, EXxEVexS, CMP }, 0 },
339 { "vcmps%XH", { MaskG, VexScalar, EXw, EXxEVexS, CMP }, 0 },
340 },
341 /* PREFIX_EVEX_MAP5_10 */
342 {
343 { Bad_Opcode },
344 { "vmovs%XH", { XMScalar, VexScalarR, EXw }, 0 },
345 },
346 /* PREFIX_EVEX_MAP5_11 */
347 {
348 { Bad_Opcode },
349 { "vmovs%XH", { EXwS, VexScalarR, XMScalar }, 0 },
350 },
351 /* PREFIX_EVEX_MAP5_1D */
352 {
353 { "vcvtss2s%XH", { XMScalar, VexScalar, EXd, EXxEVexR }, 0 },
354 { Bad_Opcode },
355 { "vcvtps2p%XHx%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
356 },
357 /* PREFIX_EVEX_MAP5_2A */
358 {
359 { Bad_Opcode },
360 { "vcvtsi2sh{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
361 },
362 /* PREFIX_EVEX_MAP5_2C */
363 {
364 { Bad_Opcode },
365 { "vcvttsh2si", { Gdq, EXw, EXxEVexS }, 0 },
366 },
367 /* PREFIX_EVEX_MAP5_2D */
368 {
369 { Bad_Opcode },
370 { "vcvtsh2si", { Gdq, EXw, EXxEVexR }, 0 },
371 },
372 /* PREFIX_EVEX_MAP5_2E */
373 {
374 { "vucomis%XH", { XMScalar, EXw, EXxEVexS }, 0 },
375 },
376 /* PREFIX_EVEX_MAP5_2F */
377 {
378 { "vcomis%XH", { XMScalar, EXw, EXxEVexS }, 0 },
379 },
380 /* PREFIX_EVEX_MAP5_51 */
381 {
382 { "vsqrtp%XH", { XM, EXxh, EXxEVexR }, 0 },
383 { "vsqrts%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
384 },
385 /* PREFIX_EVEX_MAP5_58 */
386 {
387 { "vaddp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
388 { "vadds%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
389 },
390 /* PREFIX_EVEX_MAP5_59 */
391 {
392 { "vmulp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
393 { "vmuls%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
394 },
395 /* PREFIX_EVEX_MAP5_5A */
396 {
397 { "vcvtp%XH2pd", { XM, EXxmmqdh, EXxEVexS }, 0 },
398 { "vcvts%XH2sd", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
399 { "vcvtp%XD2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
400 { "vcvts%XD2sh", { XMScalar, VexScalar, EXq, EXxEVexR }, 0 },
401 },
402 /* PREFIX_EVEX_MAP5_5B */
403 {
404 { VEX_W_TABLE (EVEX_W_MAP5_5B_P_0) },
405 { "vcvttp%XH2dq", { XM, EXxmmqh, EXxEVexS }, 0 },
406 { "vcvtp%XH2dq", { XM, EXxmmqh, EXxEVexR }, 0 },
407 },
408 /* PREFIX_EVEX_MAP5_5C */
409 {
410 { "vsubp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
411 { "vsubs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
412 },
413 /* PREFIX_EVEX_MAP5_5D */
414 {
415 { "vminp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
416 { "vmins%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
417 },
418 /* PREFIX_EVEX_MAP5_5E */
419 {
420 { "vdivp%XH", { XM, Vex, EXxh, EXxEVexR }, 0 },
421 { "vdivs%XH", { XMScalar, VexScalar, EXw, EXxEVexR }, 0 },
422 },
423 /* PREFIX_EVEX_MAP5_5F */
424 {
425 { "vmaxp%XH", { XM, Vex, EXxh, EXxEVexS }, 0 },
426 { "vmaxs%XH", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
427 },
428 /* PREFIX_EVEX_MAP5_78 */
429 {
430 { "vcvttp%XH2udq", { XM, EXxmmqh, EXxEVexS }, 0 },
431 { "vcvttsh2usi", { Gdq, EXw, EXxEVexS }, 0 },
432 { "vcvttp%XH2uqq", { XM, EXxmmqdh, EXxEVexS }, 0 },
433 },
434 /* PREFIX_EVEX_MAP5_79 */
435 {
436 { "vcvtp%XH2udq", { XM, EXxmmqh, EXxEVexR }, 0 },
437 { "vcvtsh2usi", { Gdq, EXw, EXxEVexR }, 0 },
438 { "vcvtp%XH2uqq", { XM, EXxmmqdh, EXxEVexR }, 0 },
439 },
440 /* PREFIX_EVEX_MAP5_7A */
441 {
442 { Bad_Opcode },
443 { Bad_Opcode },
444 { "vcvttp%XH2qq", { XM, EXxmmqdh, EXxEVexS }, 0 },
445 { VEX_W_TABLE (EVEX_W_MAP5_7A_P_3) },
446 },
447 /* PREFIX_EVEX_MAP5_7B */
448 {
449 { Bad_Opcode },
450 { "vcvtusi2sh{%LQ|}", { XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
451 { "vcvtp%XH2qq", { XM, EXxmmqdh, EXxEVexR }, 0 },
452 },
453 /* PREFIX_EVEX_MAP5_7C */
454 {
455 { "vcvttp%XH2uw", { XM, EXxh, EXxEVexS }, 0 },
456 { Bad_Opcode },
457 { "vcvttp%XH2w", { XM, EXxh, EXxEVexS }, 0 },
458 },
459 /* PREFIX_EVEX_MAP5_7D */
460 {
461 { "vcvtp%XH2uw", { XM, EXxh, EXxEVexR }, 0 },
462 { "vcvtw2p%XH", { XM, EXxh, EXxEVexR }, 0 },
463 { "vcvtp%XH2w", { XM, EXxh, EXxEVexR }, 0 },
464 { "vcvtuw2p%XH", { XM, EXxh, EXxEVexR }, 0 },
465 },
466 /* PREFIX_EVEX_MAP6_13 */
467 {
468 { "vcvts%XH2ss", { XMScalar, VexScalar, EXw, EXxEVexS }, 0 },
469 { Bad_Opcode },
470 { "vcvtp%XH2psx", { XM, EXxmmqh, EXxEVexS }, 0 },
471 },
472 /* PREFIX_EVEX_MAP6_56 */
473 {
474 { Bad_Opcode },
475 { "vfmaddcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
476 { Bad_Opcode },
477 { "vfcmaddcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
478 },
479 /* PREFIX_EVEX_MAP6_57 */
480 {
481 { Bad_Opcode },
482 { "vfmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
483 { Bad_Opcode },
484 { "vfcmaddcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
485 },
486 /* PREFIX_EVEX_MAP6_D6 */
487 {
488 { Bad_Opcode },
489 { "vfmulcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
490 { Bad_Opcode },
491 { "vfcmulcp%XH", { { DistinctDest_Fixup, 0 }, Vex, EXx, EXxEVexR }, 0 },
492 },
493 /* PREFIX_EVEX_MAP6_D7 */
494 {
495 { Bad_Opcode },
496 { "vfmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
497 { Bad_Opcode },
498 { "vfcmulcs%XH", { { DistinctDest_Fixup, scalar_mode }, VexScalar, EXd, EXxEVexR }, 0 },
499 },