1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Disassembler interface for targets using CGEN. -*- C -*-
3 CGEN: Cpu tools GENerator
4
5 THIS FILE IS MACHINE GENERATED WITH CGEN.
6 - the resultant file is machine generated, cgen-dis.in isn't
7
8 Copyright (C) 1996-2023 Free Software Foundation, Inc.
9
10 This file is part of libopcodes.
11
12 This library is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 3, or (at your option)
15 any later version.
16
17 It is distributed in the hope that it will be useful, but WITHOUT
18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
20 License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
25
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29 #include "sysdep.h"
30 #include <stdio.h>
31 #include "ansidecl.h"
32 #include "disassemble.h"
33 #include "bfd.h"
34 #include "symcat.h"
35 #include "libiberty.h"
36 #include "bpf-desc.h"
37 #include "bpf-opc.h"
38 #include "opintl.h"
39
40 /* Default text to print if an instruction isn't recognized. */
41 #define UNKNOWN_INSN_MSG _("*unknown*")
42
43 static void print_normal
44 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
45 static void print_address
46 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
47 static void print_keyword
48 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
49 static void print_insn_normal
50 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
51 static int print_insn
52 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
53 static int default_print_insn
54 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
55 static int read_insn
56 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
57 unsigned long *);
58
59 /* -- disassembler routines inserted here. */
60
61 /* -- dis.c */
62
63 /* We need to customize the disassembler a bit:
64 - Use 8 bytes per line by default.
65 */
66
67 #define CGEN_PRINT_INSN bpf_print_insn
68
69 static int
70 bpf_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
71 {
72 bfd_byte buf[CGEN_MAX_INSN_SIZE];
73 int buflen;
74 int status;
75
76 info->bytes_per_chunk = 1;
77 info->bytes_per_line = 8;
78
79 /* Attempt to read the base part of the insn. */
80 buflen = cd->base_insn_bitsize / 8;
81 status = (*info->read_memory_func) (pc, buf, buflen, info);
82
83 /* Try again with the minimum part, if min < base. */
84 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
85 {
86 buflen = cd->min_insn_bitsize / 8;
87 status = (*info->read_memory_func) (pc, buf, buflen, info);
88 }
89
90 if (status != 0)
91 {
92 (*info->memory_error_func) (status, pc, info);
93 return -1;
94 }
95
96 return print_insn (cd, pc, info, buf, buflen);
97 }
98
99 /* Signed immediates should be printed in hexadecimal. */
100
101 static void
102 print_immediate (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
103 void *dis_info,
104 int64_t value,
105 unsigned int attrs ATTRIBUTE_UNUSED,
106 bfd_vma pc ATTRIBUTE_UNUSED,
107 int length ATTRIBUTE_UNUSED)
108 {
109 disassemble_info *info = (disassemble_info *) dis_info;
110
111 if (value <= 9)
112 (*info->fprintf_func) (info->stream, "%" PRId64, value);
113 else
114 (*info->fprintf_func) (info->stream, "%#" PRIx64, value);
115
116 /* This is to avoid -Wunused-function for print_normal. */
117 if (0)
118 print_normal (cd, dis_info, value, attrs, pc, length);
119 }
120
121 /* Endianness bit sizes should be printed in decimal. */
122
123 static void
124 print_endsize (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
125 void *dis_info,
126 unsigned long value,
127 unsigned int attrs ATTRIBUTE_UNUSED,
128 bfd_vma pc ATTRIBUTE_UNUSED,
129 int length ATTRIBUTE_UNUSED)
130 {
131 disassemble_info *info = (disassemble_info *) dis_info;
132 (*info->fprintf_func) (info->stream, "%lu", value);
133 }
134
135
136 /* -- */
137
138 void bpf_cgen_print_operand
139 (CGEN_CPU_DESC, int, void *, CGEN_FIELDS *, void const *, bfd_vma, int);
140
141 /* Main entry point for printing operands.
142 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
143 of dis-asm.h on cgen.h.
144
145 This function is basically just a big switch statement. Earlier versions
146 used tables to look up the function to use, but
147 - if the table contains both assembler and disassembler functions then
148 the disassembler contains much of the assembler and vice-versa,
149 - there's a lot of inlining possibilities as things grow,
150 - using a switch statement avoids the function call overhead.
151
152 This function could be moved into `print_insn_normal', but keeping it
153 separate makes clear the interface between `print_insn_normal' and each of
154 the handlers. */
155
156 void
157 bpf_cgen_print_operand (CGEN_CPU_DESC cd,
158 int opindex,
159 void * xinfo,
160 CGEN_FIELDS *fields,
161 void const *attrs ATTRIBUTE_UNUSED,
162 bfd_vma pc,
163 int length)
164 {
165 disassemble_info *info = (disassemble_info *) xinfo;
166
167 switch (opindex)
168 {
169 case BPF_OPERAND_DISP16 :
170 print_normal (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
171 break;
172 case BPF_OPERAND_DISP32 :
173 print_normal (cd, info, fields->f_imm32, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
174 break;
175 case BPF_OPERAND_DSTBE :
176 print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_dstbe, 0);
177 break;
178 case BPF_OPERAND_DSTLE :
179 print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_dstle, 0);
180 break;
181 case BPF_OPERAND_ENDSIZE :
182 print_endsize (cd, info, fields->f_imm32, 0, pc, length);
183 break;
184 case BPF_OPERAND_IMM32 :
185 print_immediate (cd, info, fields->f_imm32, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
186 break;
187 case BPF_OPERAND_IMM64 :
188 print_immediate (cd, info, fields->f_imm64, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_VIRTUAL), pc, length);
189 break;
190 case BPF_OPERAND_OFFSET16 :
191 print_immediate (cd, info, fields->f_offset16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
192 break;
193 case BPF_OPERAND_SRCBE :
194 print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_srcbe, 0);
195 break;
196 case BPF_OPERAND_SRCLE :
197 print_keyword (cd, info, & bpf_cgen_opval_h_gpr, fields->f_srcle, 0);
198 break;
199
200 default :
201 /* xgettext:c-format */
202 opcodes_error_handler
203 (_("internal error: unrecognized field %d while printing insn"),
204 opindex);
205 abort ();
206 }
207 }
208
209 cgen_print_fn * const bpf_cgen_print_handlers[] =
210 {
211 print_insn_normal,
212 };
213
214
215 void
216 bpf_cgen_init_dis (CGEN_CPU_DESC cd)
217 {
218 bpf_cgen_init_opcode_table (cd);
219 bpf_cgen_init_ibld_table (cd);
220 cd->print_handlers = & bpf_cgen_print_handlers[0];
221 cd->print_operand = bpf_cgen_print_operand;
222 }
223
224
225 /* Default print handler. */
226
227 static void
228 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
229 void *dis_info,
230 long value,
231 unsigned int attrs,
232 bfd_vma pc ATTRIBUTE_UNUSED,
233 int length ATTRIBUTE_UNUSED)
234 {
235 disassemble_info *info = (disassemble_info *) dis_info;
236
237 /* Print the operand as directed by the attributes. */
238 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
239 ; /* nothing to do */
240 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
241 (*info->fprintf_func) (info->stream, "%ld", value);
242 else
243 (*info->fprintf_func) (info->stream, "0x%lx", value);
244 }
245
246 /* Default address handler. */
247
248 static void
249 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
250 void *dis_info,
251 bfd_vma value,
252 unsigned int attrs,
253 bfd_vma pc ATTRIBUTE_UNUSED,
254 int length ATTRIBUTE_UNUSED)
255 {
256 disassemble_info *info = (disassemble_info *) dis_info;
257
258 /* Print the operand as directed by the attributes. */
259 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
260 ; /* Nothing to do. */
261 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
262 (*info->print_address_func) (value, info);
263 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
264 (*info->print_address_func) (value, info);
265 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
266 (*info->fprintf_func) (info->stream, "%ld", (long) value);
267 else
268 (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
269 }
270
271 /* Keyword print handler. */
272
273 static void
274 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
275 void *dis_info,
276 CGEN_KEYWORD *keyword_table,
277 long value,
278 unsigned int attrs ATTRIBUTE_UNUSED)
279 {
280 disassemble_info *info = (disassemble_info *) dis_info;
281 const CGEN_KEYWORD_ENTRY *ke;
282
283 ke = cgen_keyword_lookup_value (keyword_table, value);
284 if (ke != NULL)
285 (*info->fprintf_func) (info->stream, "%s", ke->name);
286 else
287 (*info->fprintf_func) (info->stream, "???");
288 }
289
290 /* Default insn printer.
291
292 DIS_INFO is defined as `void *' so the disassembler needn't know anything
293 about disassemble_info. */
294
295 static void
296 print_insn_normal (CGEN_CPU_DESC cd,
297 void *dis_info,
298 const CGEN_INSN *insn,
299 CGEN_FIELDS *fields,
300 bfd_vma pc,
301 int length)
302 {
303 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
304 disassemble_info *info = (disassemble_info *) dis_info;
305 const CGEN_SYNTAX_CHAR_TYPE *syn;
306
307 CGEN_INIT_PRINT (cd);
308
309 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
310 {
311 if (CGEN_SYNTAX_MNEMONIC_P (*syn))
312 {
313 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
314 continue;
315 }
316 if (CGEN_SYNTAX_CHAR_P (*syn))
317 {
318 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
319 continue;
320 }
321
322 /* We have an operand. */
323 bpf_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
324 fields, CGEN_INSN_ATTRS (insn), pc, length);
325 }
326 }
327
328 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
329 the extract info.
330 Returns 0 if all is well, non-zero otherwise. */
331
332 static int
333 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
334 bfd_vma pc,
335 disassemble_info *info,
336 bfd_byte *buf,
337 int buflen,
338 CGEN_EXTRACT_INFO *ex_info,
339 unsigned long *insn_value)
340 {
341 int status = (*info->read_memory_func) (pc, buf, buflen, info);
342
343 if (status != 0)
344 {
345 (*info->memory_error_func) (status, pc, info);
346 return -1;
347 }
348
349 ex_info->dis_info = info;
350 ex_info->valid = (1 << buflen) - 1;
351 ex_info->insn_bytes = buf;
352
353 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
354 return 0;
355 }
356
357 /* Utility to print an insn.
358 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
359 The result is the size of the insn in bytes or zero for an unknown insn
360 or -1 if an error occurs fetching data (memory_error_func will have
361 been called). */
362
363 static int
364 print_insn (CGEN_CPU_DESC cd,
365 bfd_vma pc,
366 disassemble_info *info,
367 bfd_byte *buf,
368 unsigned int buflen)
369 {
370 CGEN_INSN_INT insn_value;
371 const CGEN_INSN_LIST *insn_list;
372 CGEN_EXTRACT_INFO ex_info;
373 int basesize;
374
375 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
376 basesize = cd->base_insn_bitsize < buflen * 8 ?
377 cd->base_insn_bitsize : buflen * 8;
378 insn_value = cgen_get_insn_value (cd, buf, basesize, cd->insn_endian);
379
380
381 /* Fill in ex_info fields like read_insn would. Don't actually call
382 read_insn, since the incoming buffer is already read (and possibly
383 modified a la m32r). */
384 ex_info.valid = (1 << buflen) - 1;
385 ex_info.dis_info = info;
386 ex_info.insn_bytes = buf;
387
388 /* The instructions are stored in hash lists.
389 Pick the first one and keep trying until we find the right one. */
390
391 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
392 while (insn_list != NULL)
393 {
394 const CGEN_INSN *insn = insn_list->insn;
395 CGEN_FIELDS fields;
396 int length;
397 unsigned long insn_value_cropped;
398
399 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
400 /* Not needed as insn shouldn't be in hash lists if not supported. */
401 /* Supported by this cpu? */
402 if (! bpf_cgen_insn_supported (cd, insn))
403 {
404 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
405 continue;
406 }
407 #endif
408
409 /* Basic bit mask must be correct. */
410 /* ??? May wish to allow target to defer this check until the extract
411 handler. */
412
413 /* Base size may exceed this instruction's size. Extract the
414 relevant part from the buffer. */
415 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
416 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
417 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
418 info->endian == BFD_ENDIAN_BIG);
419 else
420 insn_value_cropped = insn_value;
421
422 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
423 == CGEN_INSN_BASE_VALUE (insn))
424 {
425 /* Printing is handled in two passes. The first pass parses the
426 machine insn and extracts the fields. The second pass prints
427 them. */
428
429 /* Make sure the entire insn is loaded into insn_value, if it
430 can fit. */
431 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
432 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
433 {
434 unsigned long full_insn_value;
435 int rc = read_insn (cd, pc, info, buf,
436 CGEN_INSN_BITSIZE (insn) / 8,
437 & ex_info, & full_insn_value);
438 if (rc != 0)
439 return rc;
440 length = CGEN_EXTRACT_FN (cd, insn)
441 (cd, insn, &ex_info, full_insn_value, &fields, pc);
442 }
443 else
444 length = CGEN_EXTRACT_FN (cd, insn)
445 (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
446
447 /* Length < 0 -> error. */
448 if (length < 0)
449 return length;
450 if (length > 0)
451 {
452 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
453 /* Length is in bits, result is in bytes. */
454 return length / 8;
455 }
456 }
457
458 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
459 }
460
461 return 0;
462 }
463
464 /* Default value for CGEN_PRINT_INSN.
465 The result is the size of the insn in bytes or zero for an unknown insn
466 or -1 if an error occured fetching bytes. */
467
468 #ifndef CGEN_PRINT_INSN
469 #define CGEN_PRINT_INSN default_print_insn
470 #endif
471
472 static int
473 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
474 {
475 bfd_byte buf[CGEN_MAX_INSN_SIZE];
476 int buflen;
477 int status;
478
479 /* Attempt to read the base part of the insn. */
480 buflen = cd->base_insn_bitsize / 8;
481 status = (*info->read_memory_func) (pc, buf, buflen, info);
482
483 /* Try again with the minimum part, if min < base. */
484 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
485 {
486 buflen = cd->min_insn_bitsize / 8;
487 status = (*info->read_memory_func) (pc, buf, buflen, info);
488 }
489
490 if (status != 0)
491 {
492 (*info->memory_error_func) (status, pc, info);
493 return -1;
494 }
495
496 return print_insn (cd, pc, info, buf, buflen);
497 }
498
499 /* Main entry point.
500 Print one instruction from PC on INFO->STREAM.
501 Return the size of the instruction (in bytes). */
502
503 typedef struct cpu_desc_list
504 {
505 struct cpu_desc_list *next;
506 CGEN_BITSET *isa;
507 int mach;
508 int endian;
509 int insn_endian;
510 CGEN_CPU_DESC cd;
511 } cpu_desc_list;
512
513 int
514 print_insn_bpf (bfd_vma pc, disassemble_info *info)
515 {
516 static cpu_desc_list *cd_list = 0;
517 cpu_desc_list *cl = 0;
518 static CGEN_CPU_DESC cd = 0;
519 static CGEN_BITSET *prev_isa;
520 static int prev_mach;
521 static int prev_endian;
522 static int prev_insn_endian;
523 int length;
524 CGEN_BITSET *isa;
525 int mach;
526 int endian = (info->endian == BFD_ENDIAN_BIG
527 ? CGEN_ENDIAN_BIG
528 : CGEN_ENDIAN_LITTLE);
529 int insn_endian = (info->endian_code == BFD_ENDIAN_BIG
530 ? CGEN_ENDIAN_BIG
531 : CGEN_ENDIAN_LITTLE);
532 enum bfd_architecture arch;
533
534 /* ??? gdb will set mach but leave the architecture as "unknown" */
535 #ifndef CGEN_BFD_ARCH
536 #define CGEN_BFD_ARCH bfd_arch_bpf
537 #endif
538 arch = info->arch;
539 if (arch == bfd_arch_unknown)
540 arch = CGEN_BFD_ARCH;
541
542 /* There's no standard way to compute the machine or isa number
543 so we leave it to the target. */
544 #ifdef CGEN_COMPUTE_MACH
545 mach = CGEN_COMPUTE_MACH (info);
546 #else
547 mach = info->mach;
548 #endif
549
550 #ifdef CGEN_COMPUTE_ISA
551 {
552 static CGEN_BITSET *permanent_isa;
553
554 if (!permanent_isa)
555 permanent_isa = cgen_bitset_create (MAX_ISAS);
556 isa = permanent_isa;
557 cgen_bitset_clear (isa);
558 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
559 }
560 #else
561 isa = info->private_data;
562 #endif
563
564 /* If we've switched cpu's, try to find a handle we've used before */
565 if (cd
566 && (cgen_bitset_compare (isa, prev_isa) != 0
567 || mach != prev_mach
568 || endian != prev_endian))
569 {
570 cd = 0;
571 for (cl = cd_list; cl; cl = cl->next)
572 {
573 if (cgen_bitset_compare (cl->isa, isa) == 0 &&
574 cl->mach == mach &&
575 cl->endian == endian)
576 {
577 cd = cl->cd;
578 prev_isa = cd->isas;
579 break;
580 }
581 }
582 }
583
584 /* If we haven't initialized yet, initialize the opcode table. */
585 if (! cd)
586 {
587 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
588 const char *mach_name;
589
590 if (!arch_type)
591 abort ();
592 mach_name = arch_type->printable_name;
593
594 prev_isa = cgen_bitset_copy (isa);
595 prev_mach = mach;
596 prev_endian = endian;
597 prev_insn_endian = insn_endian;
598 cd = bpf_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
599 CGEN_CPU_OPEN_BFDMACH, mach_name,
600 CGEN_CPU_OPEN_ENDIAN, prev_endian,
601 CGEN_CPU_OPEN_INSN_ENDIAN, prev_insn_endian,
602 CGEN_CPU_OPEN_END);
603 if (!cd)
604 abort ();
605
606 /* Save this away for future reference. */
607 cl = xmalloc (sizeof (struct cpu_desc_list));
608 cl->cd = cd;
609 cl->isa = prev_isa;
610 cl->mach = mach;
611 cl->endian = endian;
612 cl->next = cd_list;
613 cd_list = cl;
614
615 bpf_cgen_init_dis (cd);
616 }
617
618 /* We try to have as much common code as possible.
619 But at this point some targets need to take over. */
620 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
621 but if not possible try to move this hook elsewhere rather than
622 have two hooks. */
623 length = CGEN_PRINT_INSN (cd, pc, info);
624 if (length > 0)
625 return length;
626 if (length < 0)
627 return -1;
628
629 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
630 return cd->default_insn_bitsize / 8;
631 }